18 Sep
2009
18 Sep
'09
8:42 p.m.
On Sep 17, 2009, at 10:35 PM, Mingkai Hu wrote:
diff --git a/cpu/mpc85xx/cpu_init_nand.c b/cpu/mpc85xx/cpu_init_nand.c new file mode 100644 index 0000000..e62f8d3 --- /dev/null +++ b/cpu/mpc85xx/cpu_init_nand.c @@ -0,0 +1,69 @@ +/*
- Copyright 2009 Freescale Semiconductor, Inc.
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <asm/io.h>
+void cpu_init_f(void) +{
- ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
- /*
* LCRR - Clock Ratio Register - set up local bus timing* when needed*/- out_be32(&lbc->lcrr, LCRR_DBYP | LCRR_CLKDIV_8);
+#if defined(CONFIG_NAND_BR_PRELIM) \
- && defined(CONFIG_NAND_OR_PRELIM)
- out_be32(&lbc->br0, CONFIG_NAND_BR_PRELIM);
- out_be32(&lbc->or0, CONFIG_NAND_OR_PRELIM);
- /* for FPGA */
- out_be32(&lbc->br3, CONFIG_SYS_BR3_PRELIM);
- out_be32(&lbc->or3, CONFIG_SYS_OR3_PRELIM);
+#else +#error CONFIG_NAND_BR_PRELIM, CONFIG_NAND_OR_PRELIM must be defined +#endif
Should we not have br/or1, br/or2, etc?
- k