On 12/01/2016 12:22 PM, Tony O'Brien wrote:
The read-only-write-enable bit is set by default and must be cleared to prevent overwriting read-only registers. This should be done immediately after resetting the PCI Express controller.
Reviewed-by: Hamish Martin hamish.martin@alliedtelesis.co.nz Signed-off-by: Tony O'Brien tony.obrien@alliedtelesis.co.nz
Note that this does not implement the whole fix for this erratum, just what is necessary for our implementation. Since we are using a fixed RC configuration, no support has been added for EP mode or any consideration of link-up/down events.
arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++ arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/fsl_pci.h | 4 +++- drivers/pci/fsl_pci_init.c | 7 +++++++ 4 files changed, 14 insertions(+), 1 deletion(-)
Move SYS_FSL_ERRATUM_A007815 to Kconfig. Applied to u-boot-mpc85xx master, awaiting upstream. Thanks.
York