On Thu, Jan 08, 2009 at 04:26:17AM +0300, Anton Vorontsov wrote: [...]
+#define CONFIG_SYS_PCIE1_BASE 0xA0000000 +#define CONFIG_SYS_PCIE1_MEM_BASE 0xA0000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS 0xA0000000 +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 +#define CONFIG_SYS_PCIE1_CFG_BASE 0xB0000000 +#define CONFIG_SYS_PCIE1_CFG_SIZE 0x01000000
Kim,
I recall you were concerned about 16MB cfg window. Just to clarify, now Linux doesn't actually care about the cfg window size, it maps only 4kB (minimal size) of it.
But to avoid changing PCI-E address map completely (thus to make mainline Linux run on the FSL BSP U-Boots), I left the 16 MB size intact (though I may as well write the size as 0x1000 w/o changing IO_BASE, but then there will be a hole between cfg and io regions).
Thanks,