[cc: mvebu maintainers]
I've spent the best part of today trying to get upstream u-boot running on my Armada 835 device (Turris Omnia). I think in the process I might have uncovered a bug with SPL u-boot on these SoC.
mvebu is "special" in having a different memory map in SPL vs. "main" mode. The arch SPL initialization code calls dm_set_translation_offset to tell the DM subsystem how to translate addresses. However, this is called *after* spl_init, which triggers a DM scan. So at the point where the DM subsystem is aware of the translation offset, drivers might have already cached addresses (priv->base) or even performed initialization (the TWSI i2c module does some configuration at bind time).
This seems broken but I'm not experienced enough with u-boot to suggest a good fix here. Could someone confirm that at least I'm not completely off base with this analysis?
Thanks, Best,