On Tue, May 26, 2020 at 9:04 AM Frank Wang frank.wang@rock-chips.com wrote:
RK3399 Type-C PHY is required that must hold whole USB3.0 OTG controller in resetting to hold pipe power state in P2 before initializing the PHY. This commit fixed it and added device compatible for rockchip platform.
Signed-off-by: Frank Wang frank.wang@rock-chips.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com Reviewed-by: Kever Yang kever.yang@rock-chips.com
drivers/usb/dwc3/dwc3-generic.c | 33 +++++++++++++++++++++++++++------ 1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index eabd53a36d..421e0be135 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -24,6 +24,12 @@ #include <clk.h> #include <usb/xhci.h>
+struct dwc3_glue_data {
struct clk_bulk clks;struct reset_ctl_bulk resets;fdt_addr_t regs;+};
struct dwc3_generic_plat { fdt_addr_t base; u32 maximum_speed; @@ -47,6 +53,7 @@ static int dwc3_generic_probe(struct udevice *dev, int rc; struct dwc3_generic_plat *plat = dev_get_platdata(dev); struct dwc3 *dwc3 = &priv->dwc3;
struct dwc3_glue_data *glue = dev_get_platdata(dev->parent); dwc3->dev = dev; dwc3->maximum_speed = plat->maximum_speed;@@ -55,10 +62,22 @@ static int dwc3_generic_probe(struct udevice *dev, dwc3_of_parse(dwc3); #endif
/** It must hold whole USB3.0 OTG controller in resetting to hold pipe* power state in P2 before initializing TypeC PHY on RK3399 platform.*/if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) {reset_assert_bulk(&glue->resets);udelay(1);
Need to include <linux/delay.h> to fix build warnings, maybe Kever will do while applying?
Jagan.