
On 2024/7/30 22:27, Jonas Karlman wrote:
The RK3308 SoC contains a controller for one-time-programmable memory, add a device node for it.
Signed-off-by: Jonas Karlman jonas@kwiboo.se Link: https://lore.kernel.org/r/20240521211029.1236094-9-jonas@kwiboo.se Signed-off-by: Heiko Stuebner heiko@sntech.de
[ upstream commit: 36d3bbc8cdbef2f83391f7708888265ac4c37a99 ]
(cherry picked from commit db11d284200d0f811a8f8238dbc9c63daf4e6131)
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
v2: New patch
dts/upstream/src/arm64/rockchip/rk3308.dtsi | 24 +++++++++++++++++++++ 1 file changed, 24 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3308.dtsi b/dts/upstream/src/arm64/rockchip/rk3308.dtsi index c00da150a22f..6531ede13af9 100644 --- a/dts/upstream/src/arm64/rockchip/rk3308.dtsi +++ b/dts/upstream/src/arm64/rockchip/rk3308.dtsi @@ -556,6 +556,30 @@ status = "disabled"; };
- otp: efuse@ff210000 {
compatible = "rockchip,rk3308-otp";
reg = <0x0 0xff210000 0x0 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
<&cru PCLK_OTP_PHY>;
clock-names = "otp", "apb_pclk", "phy";
resets = <&cru SRST_OTP_PHY>;
reset-names = "phy";
cpu_id: id@7 {
reg = <0x07 0x10>;
};
cpu_leakage: cpu-leakage@17 {
reg = <0x17 0x1>;
};
logic_leakage: logic-leakage@18 {
reg = <0x18 0x1>;
};
- };
- dmac0: dma-controller@ff2c0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0xff2c0000 0x0 0x4000>;