Stephen,
-----Original Message----- From: Stephen Warren [mailto:swarren@wwwdotorg.org] Sent: Monday, October 05, 2015 4:03 PM To: u-boot@lists.denx.de; Simon Glass sjg@chromium.org; Tom Warren TWarren@nvidia.com; Stephen Warren swarren@nvidia.com Cc: Thierry Reding treding@nvidia.com Subject: [PATCH 2/2] ARM: tegra: enable PCI support of p2371-2180
From: Stephen Warren swarren@nvidia.com
p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot. This patch adds the relevant DT to enable the PCI controller and configure the XUSB padctl pin muxing, and code to turn on the PCI power and enable PCI features in U- Boot. I have only tested the x4 slot.
Signed-off-by: Stephen Warren swarren@nvidia.com
This breaks the P2371-2180 build with this error:
drivers/net/rtl8169.c: In function 'rtl_recv': drivers/net/rtl8169.c:584:25: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] return rtl_recv_common((pci_dev_t)dev->priv, dev->iobase, NULL); ^ drivers/net/rtl8169.c: In function 'rtl_send': drivers/net/rtl8169.c:669:25: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] return rtl_send_common((pci_dev_t)dev->priv, dev->iobase, packet, ^ drivers/net/rtl8169.c: In function 'rtl_reset': drivers/net/rtl8169.c:849:23: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] rtl8169_common_start((pci_dev_t)dev->priv, dev->enetaddr); ^
I've taken my current u-boot-tegra/master, rebased against u-boot/master, added your armv8 NONCACHED_MEMORY patchset, then your PLLE, XUSB and PCI patchsets. Here are the top commits:
cc0451c ARM: tegra: enable PCI support of p2371-2180 3674783 ARM: tegra: add PCI to Tegra210 SoC DT a2a0f1d pci: tegra: add/enable support for Tegra210 f24777a pci: tegra: call tegra_pcie_board_init() earlier f1b57b2 pci: tegra: implement PCA enable workaround 2a0107d pci: tegra: use #address-/size-cells from DT 6be7b04 pci: tegra: clip RAM size to 32-bits d8776c4 ARM: tegra: error check Tegra210 XUSB padctl waits fb8d8c3 ARM: tegra: add lane tables to Tegra210 XUSB padctl 976b363 ARM: tegra: switch Tegra210 to common XUSB padctl 4254023 ARM: tegra: parameterize common XUSB code dfa1772 ARM: tegra: create common XUSB padctl driver file 9dcc2ce ARM: tegra: rename dummy XUSB padctl implementation a9e6908 ARM: tegra210: implement PLLE init procedure from TRM 88fdb78 ARM: tegra: enable CONFIG_SYS_NONCACHED_MEMORY everywhere ae90990 ARM: tegra: add custom MMU setup on ARMv8 f19bce4 armv8: allow custom MMU setup routines on ARMv8 d303587 armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY e8d124f Merge git://git.denx.de/u-boot-marvell 5b37212 mmc: mv_sdhci: Configure the SDHCI MBUS bridge windows 1d51ea1 arm: mvebu: Enable DM_SERIAL on AXP / A38x boards
Tom -- nvpublic
arch/arm/dts/tegra210-p2371-2180.dts | 50 ++++++++++++++++++++++++++++++++++++ board/nvidia/p2371-2180/p2371-2180.c | 30 ++++++++++++++++++++++ include/configs/p2371-2180.h | 10 ++++++++ 3 files changed, 90 insertions(+)
diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210- p2371-2180.dts index 5d9adcff31c3..bf35497d83f7 100644 --- a/arch/arm/dts/tegra210-p2371-2180.dts +++ b/arch/arm/dts/tegra210-p2371-2180.dts @@ -21,6 +21,56 @@ reg = <0x0 0x80000000 0x0 0xc0000000>; };
- pcie-controller@0,01003000 {
status = "okay";pci@1,0 {status = "okay";};pci@2,0 {status = "okay";};- };
- padctl@0,7009f000 {
pinctrl-0 = <&padctl_default>;pinctrl-names = "default";padctl_default: pinmux {xusb {nvidia,lanes = "otg-1", "otg-2";nvidia,function = "xusb";nvidia,iddq = <0>;};usb3 {nvidia,lanes = "pcie-5", "pcie-6";nvidia,function = "usb3";nvidia,iddq = <0>;};pcie-x1 {nvidia,lanes = "pcie-0";nvidia,function = "pcie-x1";nvidia,iddq = <0>;};pcie-x4 {nvidia,lanes = "pcie-1", "pcie-2","pcie-3", "pcie-4";nvidia,function = "pcie-x4";nvidia,iddq = <0>;};sata {nvidia,lanes = "sata-0";nvidia,function = "sata";nvidia,iddq = <0>;};};- };
- sdhci@0,700b0000 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; diff
--git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371- 2180/p2371-2180.c index cf2dd0b14f00..57f577d85d96 100644 --- a/board/nvidia/p2371-2180/p2371-2180.c +++ b/board/nvidia/p2371-2180/p2371-2180.c @@ -6,6 +6,7 @@ */
#include <common.h> +#include <netdev.h> #include <i2c.h> #include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> @@ -49,3 +50,32 @@ void pinmux_init(void) pinmux_config_drvgrp_table(p2371_2180_drvgrps, ARRAY_SIZE(p2371_2180_drvgrps)); }
+#ifdef CONFIG_PCI_TEGRA +int tegra_pcie_board_init(void) +{
- struct udevice *dev;
- uchar val;
- int ret;
- /* Turn on MAX77620 LDO1 to 1.05V for PEX power */
- debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__);
- ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1,
&dev);
- if (ret) {
printf("%s: Cannot find MAX77620 I2C chip\n", __func__);return -1;- }
- /* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
- val = 0xCA;
- ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1);
- if (ret)
printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret);- return 0;
+}
+int board_eth_init(bd_t *bis) +{
- return pci_eth_init(bis);
+} +#endif /* PCI */ diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 3bdf1961a317..94f8085ceb62 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -53,6 +53,16 @@ #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX
+/* PCI host support */ +#define CONFIG_PCI +#define CONFIG_PCI_TEGRA +#define CONFIG_PCI_PNP +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PCI_ENUM
+/* PCI networking support */ +#define CONFIG_RTL8169
/* General networking support */ #define CONFIG_CMD_DHCP
-- 1.9.1