Signed-off-by: Tim Harvey tharvey@gateworks.com --- drivers/ata/ahci.c | 26 +++++++++++++++++--------- include/ahci.h | 3 +++ 2 files changed, 20 insertions(+), 9 deletions(-)
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index d6753f140d..81d16925dd 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -26,6 +26,9 @@ #include <dm/device-internal.h> #include <dm/lists.h>
+#define LOWER32(val) (u32)((u64)(val) & 0xffffffff) +#define UPPER32(val) (u32)(((u64)(val) & 0xffffffff00000000) >> 32) + static int ata_io_flush(struct ahci_uc_priv *uc_priv, u8 port);
#ifndef CONFIG_DM_SCSI @@ -517,8 +520,9 @@ static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 port,
for (i = 0; i < sg_count; i++) { ahci_sg->addr = - cpu_to_le32((unsigned long) buf + i * MAX_DATA_BYTE_COUNT); - ahci_sg->addr_hi = 0; + cpu_to_le32(LOWER32(buf + i * MAX_DATA_BYTE_COUNT)); + ahci_sg->addr_hi = + cpu_to_le32(UPPER32(buf + i * MAX_DATA_BYTE_COUNT)); ahci_sg->flags_size = cpu_to_le32(0x3fffff & (buf_len < MAX_DATA_BYTE_COUNT ? (buf_len - 1) @@ -535,11 +539,8 @@ static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts) { pp->cmd_slot->opts = cpu_to_le32(opts); pp->cmd_slot->status = 0; - pp->cmd_slot->tbl_addr = cpu_to_le32((u32)pp->cmd_tbl & 0xffffffff); -#ifdef CONFIG_PHYS_64BIT - pp->cmd_slot->tbl_addr_hi = - cpu_to_le32((u32)(((pp->cmd_tbl) >> 16) >> 16)); -#endif + pp->cmd_slot->tbl_addr = cpu_to_le32(LOWER32(pp->cmd_tbl)); + pp->cmd_slot->tbl_addr_hi = cpu_to_le32(UPPER32(pp->cmd_tbl)); }
static int wait_spinup(void __iomem *port_mmio) @@ -609,10 +610,17 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) pp->cmd_tbl_sg = (struct ahci_sg *)(uintptr_t)virt_to_phys((void *)mem);
- writel_with_flush((unsigned long)pp->cmd_slot, + if (uc_priv->cap & HOST_CAP_64) + writel_with_flush(cpu_to_le32(UPPER32(pp->cmd_slot)), + port_mmio + PORT_LST_ADDR_HI); + writel_with_flush(cpu_to_le32(LOWER32(pp->cmd_slot)), port_mmio + PORT_LST_ADDR);
- writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR); + if (uc_priv->cap & HOST_CAP_64) + writel_with_flush(cpu_to_le32(UPPER32(pp->rx_fis)), + port_mmio + PORT_FIS_ADDR_HI); + writel_with_flush(cpu_to_le32(LOWER32(pp->rx_fis)), + port_mmio + PORT_FIS_ADDR);
#ifdef CONFIG_SUNXI_AHCI sunxi_dma_init(port_mmio); diff --git a/include/ahci.h b/include/ahci.h index b42df6c77e..6e439c184c 100644 --- a/include/ahci.h +++ b/include/ahci.h @@ -40,6 +40,9 @@ #define HOST_IRQ_EN (1 << 1) /* global IRQ enable */ #define HOST_AHCI_EN (1 << 31) /* AHCI enabled */
+/* HOST_CAP bits */ +#define HOST_CAP_64 (1 << 31) /* 64-bit addressing supported */ + /* Registers for each SATA port */ #define PORT_LST_ADDR 0x00 /* command list DMA addr */ #define PORT_LST_ADDR_HI 0x04 /* command list DMA addr hi */