The targets using dataflash and nandflash as storage are available.
Signed-off-by: Romain Izard romain.izard.pro@gmail.com --- MAKEALL | 1 - Makefile | 19 ---- arch/arm/include/asm/arch-at91/at91sam9263.h | 19 ++++ arch/arm/include/asm/arch-at91/at91sam9_sdramc.h | 2 +- board/atmel/at91sam9263ek/at91sam9263ek.c | 62 ++++++++------ board/atmel/at91sam9263ek/config.mk | 1 - board/atmel/at91sam9263ek/led.c | 13 +-- boards.cfg | 2 + include/configs/at91sam9263ek.h | 100 +++++++++++++--------- 9 files changed, 119 insertions(+), 100 deletions(-) delete mode 100644 board/atmel/at91sam9263ek/config.mk
diff --git a/MAKEALL b/MAKEALL index 50c0080..3aac7ca 100755 --- a/MAKEALL +++ b/MAKEALL @@ -449,7 +449,6 @@ LIST_at91="$(boards_by_soc at91)\ $(boards_by_soc at91rm9200)\ at91sam9260ek \ at91sam9261ek \ - at91sam9263ek \ at91sam9g10ek \ at91sam9g20ek \ at91sam9m10g45ek \ diff --git a/Makefile b/Makefile index 1619c47..c62601a 100644 --- a/Makefile +++ b/Makefile @@ -789,25 +789,6 @@ at91sam9g10ek_config : unconfig fi; @$(MKCONFIG) -n $@ -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91
-at91sam9263ek_norflash_config \ -at91sam9263ek_norflash_boot_config \ -at91sam9263ek_nandflash_config \ -at91sam9263ek_dataflash_config \ -at91sam9263ek_dataflash_cs0_config \ -at91sam9263ek_config : unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _nandflash,$@)" ] ; then \ - echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ - elif [ "$(findstring norflash,$@)" ] ; then \ - echo "#define CONFIG_SYS_USE_NORFLASH 1" >>$(obj)include/config.h ; \ - else \ - echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \ - fi; - @if [ "$(findstring norflash_boot,$@)" ] ; then \ - echo "#define CONFIG_SYS_USE_BOOT_NORFLASH 1" >>$(obj)include/config.h ; \ - fi; - @$(MKCONFIG) -n $@ -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91 - at91sam9rlek_nandflash_config \ at91sam9rlek_dataflash_config \ at91sam9rlek_dataflash_cs0_config \ diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h index 2a1d6ee..e48c9ff 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9263.h +++ b/arch/arm/include/asm/arch-at91/at91sam9263.h @@ -124,11 +124,30 @@ #define ATMEL_BASE_DMAC 0x00800000 /* DMA Controller */ #define ATMEL_BASE_UHP 0x00a00000 /* USB Host controller */
+#define ATMEL_BASE_EBI0_CS0 0x10000000 +#define ATMEL_BASE_EBI0_CS1 0x20000000 +#define ATMEL_BASE_EBI0_CS2 0x30000000 +#define ATMEL_BASE_EBI0_CS3 0x40000000 +#define ATMEL_BASE_EBI0_CS4 0x50000000 +#define ATMEL_BASE_EBI0_CS5 0x60000000 + +#define ATMEL_BASE_EBI1_CS0 0x70000000 +#define ATMEL_BASE_EBI1_CS1 0x80000000 +#define ATMEL_BASE_EBI1_CS2 0x90000000 + +#define ATMEL_BASE_CS0 ATMEL_BASE_EBI0_CS0 +#define ATMEL_BASE_CS1 ATMEL_BASE_EBI0_CS1 +#define ATMEL_BASE_CS2 ATMEL_BASE_EBI0_CS2 +#define ATMEL_BASE_CS3 ATMEL_BASE_EBI0_CS3 +#define ATMEL_BASE_CS4 ATMEL_BASE_EBI0_CS4 +#define ATMEL_BASE_CS5 ATMEL_BASE_EBI0_CS5 + /* * Other misc defines */ #define ATMEL_PIO_PORTS 5 /* this SoCs has 5 PIO */ #define ATMEL_BASE_PIO ATMEL_BASE_PIOA +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
/* * Cpu Name diff --git a/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h b/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h index 54159a7..2d4c49e 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h +++ b/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h @@ -20,7 +20,7 @@ #ifdef __ASSEMBLY__
#ifndef ATMEL_BASE_SDRAMC -#define ATMEL_BASE_SDRAMC AT91_SDRAMC0_BASE +#define ATMEL_BASE_SDRAMC ATMEL_BASE_SDRAMC0 #endif
#define AT91_ASM_SDRAMC_MR ATMEL_BASE_SDRAMC diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 91efc07..7af7446 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -23,17 +23,15 @@ */
#include <common.h> +#include <asm/io.h> #include <asm/sizes.h> -#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> -#include <asm/arch/at91_matrix.h> #include <asm/arch/at91_pio.h> #include <asm/arch/clk.h> -#include <asm/arch/io.h> -#include <asm/arch/hardware.h> #include <lcd.h> #include <atmel_lcdc.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) @@ -52,15 +50,13 @@ DECLARE_GLOBAL_DATA_PTR; static void at91sam9263ek_nand_hw_init(void) { unsigned long csa; - at91_smc_t *smc = (at91_smc_t *) AT91_SMC0_BASE; - at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - - /* Enable CS3 */ - csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A; - writel(csa, &matrix->csa[0]); + at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC0; + at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
/* Enable CS3 */ + csa = readl(&(matrix->csa[0])); + csa |= AT91_MATRIX_CSA_EBI_CS3A; + writel(csa, &(matrix->csa[0]));
/* Configure SMC CS3 for NAND/SmartMedia */ writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | @@ -83,9 +79,6 @@ static void at91sam9263ek_nand_hw_init(void) AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode);
- writel(1 << AT91SAM9263_ID_PIOA | 1 << AT91SAM9263_ID_PIOCDE, - &pmc->pcer); - /* Configure RDY/BSY */ at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
@@ -98,11 +91,11 @@ static void at91sam9263ek_nand_hw_init(void) static void at91sam9263ek_macb_hw_init(void) { unsigned long erstl; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; - at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC; /* Enable clock */ - writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer); + writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
/* * Disable pull-up on: @@ -153,7 +146,7 @@ vidinfo_t panel_info = { vl_vsync_len: 1, vl_upper_margin:1, vl_lower_margin:0, - mmio: AT91SAM9263_LCDC_BASE, + mmio: ATMEL_BASE_LCDC, };
void lcd_enable(void) @@ -168,7 +161,7 @@ void lcd_disable(void)
static void at91sam9263ek_lcd_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */ at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */ @@ -193,8 +186,8 @@ static void at91sam9263ek_lcd_hw_init(void) at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */ at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */
- writel(1 << AT91SAM9263_ID_LCDC, &pmc->pcer); - gd->fb_base = AT91SAM9263_SRAM0_BASE; + writel(1 << ATMEL_ID_LCDC, &pmc->pcer); + gd->fb_base = ATMEL_BASE_SRAM0; }
#ifdef CONFIG_LCD_INFO @@ -218,7 +211,7 @@ void lcd_show_board_info(void) lcd_printf ("(C) 2008 ATMEL Corp\n"); lcd_printf ("at91support@atmel.com\n"); lcd_printf ("%s CPU at %s MHz\n", - CONFIG_SYS_AT91_CPU_NAME, + ATMEL_CPU_NAME, strmhz(temp, get_cpu_clk_rate()));
dram_size = 0; @@ -244,6 +237,18 @@ void lcd_show_board_info(void) #endif /* CONFIG_LCD_INFO */ #endif
+int board_early_init_f(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + + /* Enable clocks for all PIOs */ + writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | + (1 << ATMEL_ID_PIOCDE), + &pmc->pcer); + + return 0; +} + int board_init(void) { /* Enable Ctrlc */ @@ -252,9 +257,9 @@ int board_init(void) /* arch number of AT91SAM9263EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK; /* adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
- at91_serial_hw_init(); + at91_seriald_hw_init(); #ifdef CONFIG_CMD_NAND at91sam9263ek_nand_hw_init(); #endif @@ -276,8 +281,9 @@ int board_init(void)
int dram_init(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM; - gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + gd->ram_size = get_ram_size( + (void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); return 0; }
@@ -291,7 +297,7 @@ int board_eth_init(bd_t *bis) { int rc = 0; #ifdef CONFIG_MACB - rc = macb_eth_initialize(0, (void *) AT91_EMAC_BASE, 0x00); + rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00); #endif return rc; } diff --git a/board/atmel/at91sam9263ek/config.mk b/board/atmel/at91sam9263ek/config.mk deleted file mode 100644 index e554a45..0000000 --- a/board/atmel/at91sam9263ek/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/atmel/at91sam9263ek/led.c b/board/atmel/at91sam9263ek/led.c index fa1f05b..99f0046 100644 --- a/board/atmel/at91sam9263ek/led.c +++ b/board/atmel/at91sam9263ek/led.c @@ -23,20 +23,13 @@ */
#include <common.h> -#include <asm/arch/hardware.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/at91_pio.h> +#include <asm/io.h> #include <asm/arch/gpio.h> -#include <asm/arch/io.h> +#include <asm/arch/at91_pio.h>
void coloured_LED_init(void) { - /* Enable clock */ - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - - writel(1 << AT91SAM9263_ID_PIOB | 1 << AT91SAM9263_ID_PIOCDE, - &pmc->pcer); - + /* Clock enabled in board_early_init_f() */ at91_set_pio_output(CONFIG_RED_LED, 1); at91_set_pio_output(CONFIG_GREEN_LED, 1); at91_set_pio_output(CONFIG_YELLOW_LED, 1); diff --git a/boards.cfg b/boards.cfg index ac20c81..5e2acdb 100644 --- a/boards.cfg +++ b/boards.cfg @@ -83,6 +83,8 @@ at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0 at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 +at91sam9263ek_dataflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:SYS_USE_DATAFLASH +at91sam9263ek_nandflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:SYS_USE_NANDFLASH snapper9260 arm arm926ejs - bluewater at91 snapper9260:AT91SAM9260 snapper9g20 arm arm926ejs snapper9260 bluewater at91 snapper9260:AT91SAM9G20 cpu9260 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260 diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index f6cb406..b063450 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -27,33 +27,52 @@ #ifndef __CONFIG_H #define __CONFIG_H
+/* + * SoC must be defined first, before hardware.h is included. + */ +#define CONFIG_AT91SAM9263 /* Atmel AT91SAM9263 SoC */ +#define CONFIG_AT91SAM9263EK /* It's an Atmel AT91SAM9263 EK board*/ + +#include <asm/hardware.h> + +/* + * Warning: changing CONFIG_SYS_TEXT_BASE requires + * adapting the initial boot program. + * Since the linker has to swallow that define, we must use a pure + * hex number here! + */ +#define CONFIG_SYS_TEXT_BASE 0x21f00000 + /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* main clock xtal */ #define CONFIG_SYS_HZ 1000
-#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ -#define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/ -#define CONFIG_AT91SAM9263EK 1 /* on an AT91SAM9263EK Board */ + +/* Misc CPU related */ #define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG
#ifndef CONFIG_SYS_USE_BOOT_NORFLASH #define CONFIG_SKIP_LOWLEVEL_INIT #endif
-/* - * Hardware drivers - */ -#define CONFIG_AT91_GPIO 1 -#define CONFIG_ATMEL_USART 1 -#undef CONFIG_USART0 -#undef CONFIG_USART1 -#undef CONFIG_USART2 -#define CONFIG_USART3 1 /* USART 3 is DBGU */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DISPLAY_CPUINFO + +/* general purpose I/O */ +#define CONFIG_AT91_GPIO +#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ + +/* serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID ATMEL_ID_SYS +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600}
/* LCD */ #define CONFIG_LCD 1 @@ -62,10 +81,10 @@ #undef LCD_TEST_PATTERN #define CONFIG_LCD_INFO 1 #define CONFIG_LCD_INFO_BELOW_LOGO 1 -#define CONFIG_SYS_WHITE_ON_BLACK 1 +#define CONFIG_SYS_WHITE_ON_BLACK 1 #define CONFIG_ATMEL_LCD 1 #define CONFIG_ATMEL_LCD_BGR555 1 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
/* LED */ #define CONFIG_AT91_LED @@ -99,10 +118,21 @@ #define CONFIG_CMD_NAND 1 #define CONFIG_CMD_USB 1
-/* SDRAM */ +/* + * SDRAM: 1 bank, min 32, max 128 MB + * Initialized before u-boot gets started. + */ #define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM 0x20000000 -#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CONFIG_SYS_SDRAM_SIZE 0x04000000 + +/* + * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, + * leaving the correct space for initial global data structure above + * that address while providing maximum stack area below. + */ +# define CONFIG_SYS_INIT_SP_ADDR \ + (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI @@ -156,7 +186,7 @@ (AT91_PMC_PLLAR_29 | \ AT91_PMC_PLLXR_OUT(MASTER_PLL_OUT) | \ AT91_PMC_PLLXR_PLLCOUNT(63) | \ - AT91_PMC_PLLXR_MUL(MASTER_PLL_MUL - 1) | \ + AT91_PMC_PLLXR_MUL(MASTER_PLL_MUL - 1) | \ AT91_PMC_PLLXR_DIV(MASTER_PLL_DIV))
/* PCK/2 = MCK Master Clock from PLLA */ @@ -166,7 +196,7 @@
/* PCK/2 = MCK Master Clock from PLLA */ #define CONFIG_SYS_MCKR2_VAL \ - (AT91_PMC_MCKR_CSS_PLLA | AT91_PMC_MCKR_PRES_1 | \ + (AT91_PMC_MCKR_CSS_PLLA | AT91_PMC_MCKR_PRES_1 | \ AT91_PMC_MCKR_MDIV_2)
/* define PDC[31:16] as DATA[31:16] */ @@ -253,20 +283,13 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_NAND_ATMEL -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_DBW_8 1 -/* our ALE is AD21 */ -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) -/* our CLE is AD22 */ -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 +#define CONFIG_SYS_NAND_DBW_8 +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 #define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22 -/* -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 -*/ -
#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif @@ -291,7 +314,7 @@
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END 0x23e00000
#ifdef CONFIG_SYS_USE_DATAFLASH @@ -323,9 +346,6 @@
#endif
-#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } - #define CONFIG_SYS_PROMPT "U-Boot> " #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16