Hi Sagar,
On Wed, Jan 29, 2020 at 2:02 AM Sagar Shrikant Kadam sagar.kadam@sifive.com wrote:
The hifive-unleashed-a00.dts has flash spi-tx/rx width set to 4-bit mode. During sf probe, spi_nor_scan fails to read the JEDEC ID with reg_proto set to SNOR_PROTO_1_1_1. Setting it to 1-bit mode as of now will help read the JEDEC-ID and perform other flash operations.
So previously with Jagan's series that did not have these changes in this commit, the flash driver worked well. I wonder what real issue was fixed in this commit?
Signed-off-by: Sagar Shrikant Kadam sagar.kadam@sifive.com
arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi index d7a6413..dae9f87 100644 --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi @@ -9,3 +9,11 @@ spi2 = &qspi2; }; };
+&qspi0 {
flash@0 {spi-tx-bus-width = <1>;spi-rx-bus-width = <1>;};+};
Regards, Bin