This is easier to deal with when using generic code since it allows us to use a register index instead of naming each register.
Adjust it, adding an enum to improve readability.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v9: None Changes in v2: None
arch/arm/include/asm/arch-rockchip/pmu_rk3288.h | 12 ++++++++---- drivers/pinctrl/rockchip/pinctrl_rk3288.c | 4 ++-- 2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/pmu_rk3288.h b/arch/arm/include/asm/arch-rockchip/pmu_rk3288.h index 12fa685..081675e 100644 --- a/arch/arm/include/asm/arch-rockchip/pmu_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/pmu_rk3288.h @@ -46,14 +46,18 @@ struct rk3288_pmu { u32 gpio_op;
u32 gpio0_sel18; /* 0x80 */ - u32 gpio0a_iomux; - u32 gpio0b_iomux; - u32 gpio0c_iomux; - u32 gpio0d_iomux; + u32 gpio0_iomux[4]; /* a, b, c, d */ u32 sys_reg[4]; }; check_member(rk3288_pmu, sys_reg[3], 0x00a0);
+enum { + PMU_GPIO0_A = 0, + PMU_GPIO0_B, + PMU_GPIO0_C, + PMU_GPIO0_D, +}; + /* PMU_GPIO0_B_IOMUX */ enum { GPIO0_B7_SHIFT = 14, diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c index c432a00..ec3c4fe 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c @@ -56,10 +56,10 @@ static void pinctrl_rk3288_i2c_config(struct rk3288_grf *grf, { switch (i2c_id) { case PERIPH_ID_I2C0: - clrsetbits_le32(&pmu->gpio0b_iomux, + clrsetbits_le32(&pmu->gpio0_iomux[PMU_GPIO0_B], GPIO0_B7_MASK << GPIO0_B7_SHIFT, GPIO0_B7_I2C0PMU_SDA << GPIO0_B7_SHIFT); - clrsetbits_le32(&pmu->gpio0b_iomux, + clrsetbits_le32(&pmu->gpio0_iomux[PMU_GPIO0_C], GPIO0_C0_MASK << GPIO0_C0_SHIFT, GPIO0_C0_I2C0PMU_SCL << GPIO0_C0_SHIFT); break;