On Tue, Mar 25, 2014 at 10:27:35AM -0600, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
This removes a bunch of open-coded register IO, masking, and shifting. I would have squashed this into "ARM: tegra: pinctrl: remove duplication" except that keeping it a separate commit allows easier bisection of any issues that are introduced by this patch. I also wrote this patch on top of the series, and pushing it any lower in the series results in some conflicts I didn't feel like fixing.
Since things got a bit heated here while I was reading some other stuff...
[snip]
+static inline void update_reg_mask_shift_val(u32 *reg, u32 mask, u32 shift,
u32 val)+{
- clrsetbits_le32(reg, mask << shift, val << shift);
+}
So, lack of comments bad. Intention, good. We have a bitfield of size M (that's all cleared in the mask) and value that may be less than M bits wide. The name is a mouthful (but I see where Simon was coming from, had I caught in time I might have suggested a comment instead.
But as Wolfgang's v4 shows, it's also not hard to just call clrsetbits_le32 directly. Arguably the cases where mask==1 we should just call setbits_le32 but that's not a big deal.