On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Tested with OHCI and pxafb drivers - no issues found
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
arch/arm/cpu/pxa/Makefile | 1 + arch/arm/cpu/pxa/cache.c | 62 ++++++++++++++++++++++++++++++++++++++++++++ arch/arm/cpu/pxa/pxa2xx.c | 10 +++++++ include/configs/pxa-common.h | 1 + 4 files changed, 74 insertions(+) create mode 100644 arch/arm/cpu/pxa/cache.c
diff --git a/arch/arm/cpu/pxa/Makefile b/arch/arm/cpu/pxa/Makefile index 3ee08cd..79fcb73 100644 --- a/arch/arm/cpu/pxa/Makefile +++ b/arch/arm/cpu/pxa/Makefile @@ -14,3 +14,4 @@ obj-y += cpuinfo.o obj-y += timer.o obj-y += usb.o obj-y += relocate.o +obj-y += cache.o diff --git a/arch/arm/cpu/pxa/cache.c b/arch/arm/cpu/pxa/cache.c new file mode 100644 index 0000000..7aba112 --- /dev/null +++ b/arch/arm/cpu/pxa/cache.c @@ -0,0 +1,62 @@ +/*
- (C) Copyright 2016 Vasily Khoruzhick anarsoul@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <linux/types.h> +#include <common.h>
+#ifndef CONFIG_SYS_DCACHE_OFF
+#ifndef CONFIG_SYS_CACHELINE_SIZE +#define CONFIG_SYS_CACHELINE_SIZE 32
This condition where CONFIG_SYS_CACHELINE_SIZE is undefined must not ever happen.
+#endif
+void invalidate_dcache_all(void) +{
- /* Flush/Invalidate I cache */
- asm volatile("mcr p15, 0, %0, c7, c5, 0\n" : : "r"(0));
- /* Flush/Invalidate D cache */
- asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
+}
+void flush_dcache_all(void) +{
- return invalidate_dcache_all();
+}
+void invalidate_dcache_range(unsigned long start, unsigned long stop) +{
- start &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
- stop &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
Apply same sanity check as armv7 does please.
- while (start <= stop) {
asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start));start += CONFIG_SYS_CACHELINE_SIZE;- }
+}
+void flush_dcache_range(unsigned long start, unsigned long stop) +{
- return invalidate_dcache_range(start, stop);
+} +#else /* #ifndef CONFIG_SYS_DCACHE_OFF */ +void invalidate_dcache_all(void) +{ +}
+void flush_dcache_all(void) +{ +} +#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
+/*
- Stub implementations for l2 cache operations
- */
+__weak void l2_cache_disable(void) {}
+#if defined CONFIG_SYS_THUMB_BUILD +__weak void invalidate_l2_cache(void) {} +#endif diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c index 2f12fb9..77f0ef2 100644 --- a/arch/arm/cpu/pxa/pxa2xx.c +++ b/arch/arm/cpu/pxa/pxa2xx.c @@ -284,3 +284,13 @@ void reset_cpu(ulong ignored) for (;;) ; }
+void enable_caches(void) +{ +#ifndef CONFIG_SYS_ICACHE_OFF
- icache_enable();
+#endif +#ifndef CONFIG_SYS_DCACHE_OFF
- dcache_enable();
+#endif +} diff --git a/include/configs/pxa-common.h b/include/configs/pxa-common.h index 4c1c2c7..7295687 100644 --- a/include/configs/pxa-common.h +++ b/include/configs/pxa-common.h @@ -10,6 +10,7 @@ #define __CONFIG_PXA_COMMON_H__
#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
/*
- KGDB