Dear Gabriel Huau,
In message 1335734845-27396-1-git-send-email-contact@huau-gabriel.fr you wrote:
+/*
- When booting from NAND, it is impossible to access the lowest addresses
- due to the SteppingStone being in the way. Luckily the NOR doesn't really
- care about the highest 16 bits of address, so we set the controlers
- registers to go and poke over there, instead.
- */
+#define PHYS_FLASH_1 0x0 +#define CONFIG_SYS_FLASH_BASE 0x0
Urghh... this sounds very much like a serious design issue?
About this point, I ported it from the old version uboot as well. It may need some investigation, but I remember it was a big problem with this board. In the case of a NAND boot, we don't have access to NOR because the SteppingStone (SRAM) is mapped at the same range.
Should this not only affect the SPL part of the code, while you could use normal mappings for the real U-Boot.
Umm... but I don't even see any reference to SPL files here. Is this current code supposed to support NAND booting? and if so, why doesn;t it use SPL?
Best regards,
Wolfgang Denk