
On Fri, Nov 10, 2017 at 11:34 AM, Chen-Yu Tsai wens@csie.org wrote:
On Fri, Nov 10, 2017 at 2:01 PM, Jagan Teki jagannadh.teki@gmail.com wrote:
On Fri, Nov 10, 2017 at 9:52 AM, Chen-Yu Tsai wens@csie.org wrote:
On Wed, Sep 27, 2017 at 11:46 PM, Joe Hershberger joe.hershberger@ni.com wrote:
On Fri, Sep 22, 2017 at 2:26 AM, Chen-Yu Tsai wens@csie.org wrote:
Only the H3/H5 SoCs have an internal PHY and its related clock and reset controls.
Use an #ifdef to guard the internal PHY control code block so it can be built for other SoCs, such as the A83T or A64.
Signed-off-by: Chen-Yu Tsai wens@csie.org
Reviewed-by: Joe Hershberger joe.hershberger@ni.com
This hasn't been applied yet. Can someone apply this? Jagan?
Few emac patches on this series still under review, was this independent fix?
I would consider it an independent fix. Nothing prevents people from manually enabling the EMAC driver on other SoCs. They will then get a build fail that this patch fixes.
As for the other patches, I respin them soon enough.
Applied to u-boot-sunxi/master
thanks!