The code should be setting registers to zero, not one register to value. Swap the order of arguments to correct the behavior. The behavior is now in-line with code generated by Quartus 15.1 .
Signed-off-by: Marek Vasut marex@denx.de Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Chin Liang See clsee@altera.com --- drivers/ddr/altera/sequencer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index bf74b4e..3859e66 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -279,7 +279,7 @@ static void scc_mgr_initialize(void) for (i = 0; i < 16; i++) { debug_cond(DLEVEL == 1, "%s:%d: Clearing SCC RFILE index %u\n", __func__, __LINE__, i); - scc_mgr_set(SCC_MGR_HHP_RFILE_OFFSET, 0, i); + scc_mgr_set(SCC_MGR_HHP_RFILE_OFFSET, i, 0); } }