Hi Rick,
On Mon, Jul 20, 2020 at 2:18 PM Bin Meng bmeng.cn@gmail.com wrote:
From: Bin Meng bin.meng@windriver.com
Commit 40686c394e53 ("riscv: Clean up IPI initialization code") caused U-Boot failed to boot on SiFive HiFive Unleashed board.
The codes inside arch_cpu_init_dm() may call U-Boot timer APIs before the call to riscv_init_ipi(). At that time the timer register base (e.g.: the SiFive CLINT device in this case) is unknown yet.
It might be the name riscv_init_ipi() that misleads people to only consider it is related to IPI, but in fact the timer capability is provided by the same SiFive CLINT device that provides the IPI. Timer capability is needed for both UP and SMP.
Considering that the original refactor does have benefits, that it makes the IPI code more similar to U-Boot initialization idioms. It also removes some quite ugly macros. Let's do the minimal revert instead of a complete revert, plus a fixes to arch_cpu_init_dm() to consider the SPL case.
Fixes: 40686c394e53 ("riscv: Clean up IPI initialization code") Signed-off-by: Bin Meng bin.meng@windriver.com Reviewed-by: Sean Anderson seanga2@gmail.com
Changes in v4:
- Include Sean's "Reviewed-by" tag
Changes in v3:
- Simply call riscv_init_ipi() in clint timer functions to avoid some duplications
Changes in v2:
- Do the minimal partial revert instead of a complete revert, enough to make HiFive Unleashed board boot again.
arch/riscv/cpu/cpu.c | 2 +- arch/riscv/lib/sifive_clint.c | 16 ++++++++++++---- common/spl/spl_opensbi.c | 5 ----- 3 files changed, 13 insertions(+), 10 deletions(-)
Since currently FU540 is broken, could you please adjust the patch order to make this patch show up at the very beginning of the u-boot-riscv/master tree?
Regards, Bin