On 05/23/2013 03:49 PM, Albert ARIBAUD wrote:
Hi Peter,
On Thu, 23 May 2013 15:08:24 -0400, Peter Barada peter.barada@logicpd.com wrote:
On 05/23/2013 02:53 PM, Albert ARIBAUD wrote:
Also, I *very* strongly suggest that you integrate *some* debugging interface, based on *some* industry standard. Seeing as you're working on a brand new, untested so far, silicon, such a debugging interface is an absolute must IMO.
Ditto here.
JTAG (or some other industry debugging standard) allows attaching mature tools (like an Abatron BDI or some such) to not only help verify the state, but develop/debug the code you're writing. Without such you'll only be able to do a postmortem and inspect memory after the code/processor crash - a much more laborious process...
One won't even be able to do that, at least not if the inspection is done using Bedbug within U-Boot since launching U-boot will, in itself, overwrite some of the memory -- and Murphy guarantees that the overwritten memory will include the areas needed for a successful postmortem.
If one was lucky maybe. But who builds schedules around luck? And yes, Murphy's a mother...
I was assuming that through some black magic they could get into Bedbug on reset and use it to inspect memory. Of course this assumes that Bedbug and u-boot don't collide, u-boot doesn't try to relocate itself (or scribble over memory), all of which is extra development that a JTAG[1] attached debugger would preclude.
A JTAG debugger would allow you to load code directly into memory and then step through the processor initialization(or supply instructions on the fly!), low-level startup development that everyone does on a new processor. Also by stepping you can see where/when the processor is about to go off into the weeds many, many, many instructions _before_ it munches any hope of postmortem debugging. From experience bringing up boards w/o JTAG is not only tedious but unpredictable and takes a loooong time - the extra cost/effort of integrating JTAG (especially since this is a spanking new processor!) is more than justified by it reducing both total development time and overall schedule risk...
[1] I use JTAG to mean any industry standard hardware debug/access method that allows arbitrary execution and inspection/modification of registers/memory...