
28 Aug
2019
28 Aug
'19
3:16 p.m.
On Wed, Aug 28, 2019 at 6:52 PM Andes uboot@andestech.com wrote:
From: Rick Chen rick@andestech.com
Add a v5l2 cache controller driver that is usually found on Andes RISC-V ae350 platform. It will parse the cache settings from the dtb.
In this version tag and data ram control timing can be adjusted by the requirement from the dtb.
Signed-off-by: Rick Chen rick@andestech.com Cc: KC Lin kclin@andestech.com
drivers/cache/Kconfig | 9 +++ drivers/cache/Makefile | 1 + drivers/cache/cache-v5l2.c | 186 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 196 insertions(+) create mode 100644 drivers/cache/cache-v5l2.c
Reviewed-by: Bin Meng bmeng.cn@gmail.com