Signed-off-by: Wolfgang Denk wd@denx.de --- MAKEALL | 1 - board/voiceblue/Makefile | 74 ----------- board/voiceblue/config.mk | 1 - board/voiceblue/eeprom.c | 218 --------------------------------- board/voiceblue/setup.S | 280 ------------------------------------------- board/voiceblue/voiceblue.c | 80 ------------ boards.cfg | 1 - doc/README.scrapyard | 1 + include/configs/voiceblue.h | 241 ------------------------------------- 9 files changed, 1 insertions(+), 896 deletions(-) delete mode 100644 board/voiceblue/Makefile delete mode 100644 board/voiceblue/config.mk delete mode 100644 board/voiceblue/eeprom.c delete mode 100644 board/voiceblue/setup.S delete mode 100644 board/voiceblue/voiceblue.c delete mode 100644 include/configs/voiceblue.h
diff --git a/MAKEALL b/MAKEALL index d6d04b7..b230ff1 100755 --- a/MAKEALL +++ b/MAKEALL @@ -346,7 +346,6 @@ LIST_ARM9=" \ spear320 \ spear600 \ VCMA9 \ - voiceblue \ davinci_dvevm \ davinci_schmoogie \ davinci_sffsdr \ diff --git a/board/voiceblue/Makefile b/board/voiceblue/Makefile deleted file mode 100644 index e16b195..0000000 --- a/board/voiceblue/Makefile +++ /dev/null @@ -1,74 +0,0 @@ -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de -# -# (C) Copyright 2005 -# Ladislav Michl, 2N Telekomunikace, michl@2n.cz -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License version 2 as -# published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := voiceblue.o -SOBJS := setup.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -LOAD_ADDR = 0x10400000 - -######################################################################### - -all: $(obj).depend $(LIB) $(obj)eeprom.srec $(obj)eeprom.bin - -$(LIB): $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $^) - -$(obj)eeprom_start.o: - echo "b eeprom" | $(CC) $(AFLAGS) -c -x assembler -o $@ - - -$(obj)eeprom: $(obj)eeprom_start.o $(obj)eeprom.o - $(LD) -Ttext $(LOAD_ADDR) -e eeprom -o $@ $^ \ - -L$(obj)../../examples/standalone -lstubs \ - $(PLATFORM_LIBS) - -$(obj)eeprom.srec: $(obj)eeprom - $(OBJCOPY) -S -O srec $(<:.o=) $@ - -$(obj)eeprom.bin: $(obj)eeprom - $(OBJCOPY) -S -O binary $< $@ - -clean: - rm -f $(SOBJS) $(OBJS) $(obj)eeprom \ - $(obj)eeprom.srec $(obj)eeprom.bin \ - $(obj)eeprom.o $(obj)eeprom_start.o - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/voiceblue/config.mk b/board/voiceblue/config.mk deleted file mode 100644 index 412b57d..0000000 --- a/board/voiceblue/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x13FD0000 diff --git a/board/voiceblue/eeprom.c b/board/voiceblue/eeprom.c deleted file mode 100644 index aa6baca..0000000 --- a/board/voiceblue/eeprom.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - * (C) Copyright 2005 - * Ladislav Michl, 2N Telekomunikace, michl@2n.cz - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Some code shamelessly stolen back from Robin Getz. - */ - -#include <common.h> -#include <exports.h> -#include <timestamp.h> -#include <net.h> -#include "../drivers/net/smc91111.h" - -static struct eth_device dev = { - .iobase = CONFIG_SMC91111_BASE -}; - -static u16 read_eeprom_reg(u16 reg) -{ - int timeout; - - SMC_SELECT_BANK(&dev, 2); - SMC_outw(&dev, reg, PTR_REG); - - SMC_SELECT_BANK(&dev, 1); - SMC_outw(&dev, SMC_inw(&dev, CTL_REG) | CTL_EEPROM_SELECT | - CTL_RELOAD, CTL_REG); - - timeout = 100; - - while ((SMC_inw(&dev, CTL_REG) & CTL_RELOAD) && --timeout) - udelay(100); - if (timeout == 0) { - printf("Timeout reading register %02x\n", reg); - return 0; - } - - return SMC_inw(&dev, GP_REG); -} - -static int write_eeprom_reg(u16 value, u16 reg) -{ - int timeout; - - SMC_SELECT_BANK(&dev, 2); - SMC_outw(&dev, reg, PTR_REG); - - SMC_SELECT_BANK(&dev, 1); - - SMC_outw(&dev, value, GP_REG); - SMC_outw(&dev, SMC_inw(&dev, CTL_REG) | CTL_EEPROM_SELECT | - CTL_STORE, CTL_REG); - - timeout = 100; - - while ((SMC_inw(&dev, CTL_REG) & CTL_STORE) && --timeout) - udelay(100); - if (timeout == 0) { - printf("Timeout writing register %02x\n", reg); - return 0; - } - - return 1; -} - -static int write_data(u16 *buf, int len) -{ - u16 reg = 0x23; - - while (len--) - write_eeprom_reg(*buf++, reg++); - - return 0; -} - -static int verify_macaddr(char *s) -{ - u16 reg; - int i, err = 0; - - puts("HWaddr: "); - for (i = 0; i < 3; i++) { - reg = read_eeprom_reg(0x20 + i); - printf("%02x:%02x%c", reg & 0xff, reg >> 8, i != 2 ? ':' : '\n'); - if (s) - err |= reg != ((u16 *)s)[i]; - } - - return err ? 0 : 1; -} - -static int set_mac(char *s) -{ - int i; - char *e, eaddr[6]; - - /* turn string into mac value */ - for (i = 0; i < 6; i++) { - eaddr[i] = simple_strtoul(s, &e, 16); - s = (*e) ? e+1 : e; - } - - for (i = 0; i < 3; i++) - write_eeprom_reg(*(((u16 *)eaddr) + i), 0x20 + i); - - return 0; -} - -static int parse_element(char *s, unsigned char *buf, int len) -{ - int cnt; - char *p, num[3]; - unsigned char id; - - id = simple_strtoul(s, &p, 16); - if (*p++ != ':') - return -1; - cnt = 2; - num[2] = 0; - for (; *p; p += 2) { - if (p[1] == 0) - return -2; - if (cnt + 3 > len) - return -3; - num[0] = p[0]; - num[1] = p[1]; - buf[cnt++] = simple_strtoul(num, NULL, 16); - } - buf[0] = id; - buf[1] = cnt - 2; - - return cnt; -} - -int eeprom(int argc, char * const argv[]) -{ - int i, len, ret; - unsigned char buf[58], *p; - - app_startup(argv); - i = get_version(); - if (i != XF_VERSION) { - printf("Using ABI version %d, but U-Boot provides %d\n", - XF_VERSION, i); - return 1; - } - - if ((SMC_inw(&dev, BANK_SELECT) & 0xFF00) != 0x3300) { - puts("SMSC91111 not found\n"); - return 2; - } - - /* Called without parameters - print MAC address */ - if (argc < 2) { - verify_macaddr(NULL); - return 0; - } - - /* Print help message */ - if (argv[1][1] == 'h') { - puts("VoiceBlue EEPROM writer\n" - "Built: " U_BOOT_DATE " at " U_BOOT_TIME "\n" - "Usage:\n\t<mac_address> [<element_1>] [<...>]\n"); - return 0; - } - - /* Try to parse information elements */ - len = sizeof(buf); - p = buf; - for (i = 2; i < argc; i++) { - ret = parse_element(argv[i], p, len); - switch (ret) { - case -1: - printf("Element %d: malformed\n", i - 1); - return 3; - case -2: - printf("Element %d: odd character count\n", i - 1); - return 3; - case -3: - puts("Out of EEPROM memory\n"); - return 3; - default: - p += ret; - len -= ret; - } - } - - /* First argument (MAC) is mandatory */ - set_mac(argv[1]); - if (verify_macaddr(argv[1])) { - puts("*** HWaddr does not match! ***\n"); - return 4; - } - - while (len--) - *p++ = 0; - - write_data((u16 *)buf, sizeof(buf) >> 1); - - return 0; -} diff --git a/board/voiceblue/setup.S b/board/voiceblue/setup.S deleted file mode 100644 index 6dddd6b..0000000 --- a/board/voiceblue/setup.S +++ /dev/null @@ -1,280 +0,0 @@ -/* - * Board specific setup info - * - * (C) Copyright 2004 Ales Jindra jindra@2n.cz - * (C) Copyright 2005 Ladislav Michl michl@2n.cz - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <version.h> - -_TEXT_BASE: - .word CONFIG_SYS_TEXT_BASE /* SDRAM load addr from config.mk */ - -OMAP5910_LPG1_BASE: .word 0xfffbd000 -OMAP5910_TIPB_SWITCHES_BASE: .word 0xfffbc800 -OMAP5910_MPU_TC_BASE: .word 0xfffecc00 -OMAP5910_MPU_CLKM_BASE: .word 0xfffece00 -OMAP5910_ULPD_PWR_MNG_BASE: .word 0xfffe0800 -OMAP5910_DPLL1_BASE: .word 0xfffecf00 -OMAP5910_GPIO_BASE: .word 0xfffce000 -OMAP5910_MPU_WD_TIMER_BASE: .word 0xfffec800 -OMAP5910_MPUI_BASE: .word 0xfffec900 - -_OMAP5910_ARM_CKCTL: .word OMAP5910_ARM_CKCTL -_OMAP5910_ARM_EN_CLK: .word OMAP5910_ARM_EN_CLK - -OMAP5910_MPUI_CTRL: .word 0x0000ff1b - -VAL_EMIFS_CS0_CONFIG: .word 0x00009090 -VAL_EMIFS_CS1_CONFIG: .word 0x00003031 -VAL_EMIFS_CS2_CONFIG: .word 0x00003031 -VAL_EMIFS_CS3_CONFIG: .word 0x0000c0c0 -VAL_EMIFS_DYN_WAIT: .word 0x00000000 -/* autorefresh counter 0x246 ((64000000/13.4)-400)/8192) */ - /* SLRF SD_RET ARE SDRAM_TYPE ARCV SDRAM_FREQUENCY PWD CLK */ -VAL_EMIFF_SDRAM_CONFIG: .word ((0 << 0) | (0 << 1) | (3 << 2) | (0xd << 4) | (0x246 << 8) | (0 << 24) | (0 << 26) | (0 << 27)) -VAL_EMIFF_SDRAM_CONFIG2: .word 0x00000003 -VAL_EMIFF_MRS: .word 0x00000037 - -/* - * GPIO04 - D4 (Onboard LED) - * GPIO07 - LAN91C111 reset - */ -GPIO_DIRECTION: - .word 0x0000ff6f -/* - * Disable everything, but D4 LED (connected through invertor) - */ -GPIO_OUTPUT: - .word 0x00000010 - -MUX_CONFIG_BASE: - .word 0xfffe1000 - -MUX_CONFIG_VALUES: - .align 4 - .word 0x00000000 @ FUNC_MUX_CTRL_0 - .word 0x00000000 @ FUNC_MUX_CTRL_1 - .word 0x00000000 @ FUNC_MUX_CTRL_2 - .word 0x00000000 @ FUNC_MUX_CTRL_3 - .word 0x00000000 @ FUNC_MUX_CTRL_4 - .word 0x12082480 @ FUNC_MUX_CTRL_5 - .word 0x0000001c @ FUNC_MUX_CTRL_6 - .word 0x00000003 @ FUNC_MUX_CTRL_7 - .word 0x10001200 @ FUNC_MUX_CTRL_8 - .word 0x01201012 @ FUNC_MUX_CTRL_9 - .word 0x02081248 @ FUNC_MUX_CTRL_A - .word 0x00001248 @ FUNC_MUX_CTRL_B - .word 0x12240000 @ FUNC_MUX_CTRL_C - .word 0x00002000 @ FUNC_MUX_CTRL_D - .word 0x00000000 @ PULL_DWN_CTRL_0 - .word 0x0000085f @ PULL_DWN_CTRL_1 - .word 0x01001000 @ PULL_DWN_CTRL_2 - .word 0x00000000 @ PULL_DWN_CTRL_3 - .word 0x00000000 @ GATE_INH_CTRL_0 - .word 0x00000000 @ VOLTAGE_CTRL_0 - .word 0x00000000 @ TEST_DBG_CTRL_0 - .word 0x00000006 @ MOD_CONF_CTRL_0 - .word 0x0000eaef @ COMP_MODE_CTRL_0 - -MUX_CONFIG_OFFSETS: - .align 1 - .byte 0x00 @ FUNC_MUX_CTRL_0 - .byte 0x04 @ FUNC_MUX_CTRL_1 - .byte 0x08 @ FUNC_MUX_CTRL_2 - .byte 0x10 @ FUNC_MUX_CTRL_3 - .byte 0x14 @ FUNC_MUX_CTRL_4 - .byte 0x18 @ FUNC_MUX_CTRL_5 - .byte 0x1c @ FUNC_MUX_CTRL_6 - .byte 0x20 @ FUNC_MUX_CTRL_7 - .byte 0x24 @ FUNC_MUX_CTRL_8 - .byte 0x28 @ FUNC_MUX_CTRL_9 - .byte 0x2c @ FUNC_MUX_CTRL_A - .byte 0x30 @ FUNC_MUX_CTRL_B - .byte 0x34 @ FUNC_MUX_CTRL_C - .byte 0x38 @ FUNC_MUX_CTRL_D - .byte 0x40 @ PULL_DWN_CTRL_0 - .byte 0x44 @ PULL_DWN_CTRL_1 - .byte 0x48 @ PULL_DWN_CTRL_2 - .byte 0x4c @ PULL_DWN_CTRL_3 - .byte 0x50 @ GATE_INH_CTRL_0 - .byte 0x60 @ VOLTAGE_CTRL_0 - .byte 0x70 @ TEST_DBG_CTRL_0 - .byte 0x80 @ MOD_CONF_CTRL_0 - .byte 0x0c @ COMP_MODE_CTRL_0 - .byte 0xff - -.globl lowlevel_init -lowlevel_init: - /* Improve performance a bit... */ - mrc p15, 0, r1, c0, c0, 0 @ read C15 ID register - mrc p15, 0, r1, c0, c0, 1 @ read C15 Cache information register - mrc p15, 0, r1, c1, c0, 0 @ read C15 Control register - orr r1, r1, #0x1000 @ enable I-cache, map interrupt vector 0xffff0000 - mcr p15, 0, r1, c1, c0, 0 @ write C15 Control register - mov r1, #0x00 - mcr p15, 0, r1, c7, c5, 0 @ Flush I-cache - nop - nop - nop - nop - - /* Setup clocking mode */ - ldr r0, OMAP5910_MPU_CLKM_BASE @ prepare base of CLOCK unit - ldrh r1, [r0, #0x18] @ get reset status - bic r1, r1, #(7 << 11) @ clear clock select - orr r1, r1, #(2 << 11) @ set synchronous scalable - mov r2, #0 @ set wait counter to 100 clock cycles - -icache_loop: - cmp r2, #0x01 - streqh r1, [r0, #0x18] - add r2, r2, #0x01 - cmp r2, #0x10 - bne icache_loop - nop - - /* Setup clock divisors */ - ldr r0, OMAP5910_MPU_CLKM_BASE @ base of CLOCK unit - ldr r1, _OMAP5910_ARM_CKCTL - orr r1, r1, #0x2000 @ enable DSP clock - strh r1, [r0, #0x00] @ setup clock divisors - - /* Setup DPLL to generate requested freq */ - ldr r0, OMAP5910_DPLL1_BASE @ base of DPLL1 register - mov r1, #0x0010 @ set PLL_ENABLE - orr r1, r1, #0x2000 @ set IOB to new locking - orr r1, r1, #(OMAP5910_DPLL_MUL << 7) @ setup multiplier CLKREF - orr r1, r1, #(OMAP5910_DPLL_DIV << 5) @ setup divider CLKREF - strh r1, [r0] @ write - -locking: - ldrh r1, [r0] @ get DPLL value - tst r1, #0x01 - beq locking @ while LOCK not set - - /* Enable clock */ - ldr r0, OMAP5910_MPU_CLKM_BASE @ base of CLOCK unit - mov r1, #(1 << 10) @ disable idle mode do not check - @ nWAKEUP pin, other remain active - strh r1, [r0, #0x04] - ldr r1, _OMAP5910_ARM_EN_CLK - strh r1, [r0, #0x08] - mov r1, #0x003f @ FLASH.RP not enabled in idle and - @ max delayed ( 32 x CLKIN ) - strh r1, [r0, #0x0c] - - /* Configure 5910 pins functions to match our board. */ - ldr r0, MUX_CONFIG_BASE - adr r1, MUX_CONFIG_VALUES - adr r2, MUX_CONFIG_OFFSETS -next_mux_cfg: - ldrb r3, [r2], #1 - ldr r4, [r1], #4 - cmp r3, #0xff - strne r4, [r0, r3] - bne next_mux_cfg - - /* Configure GPIO pins (also enables onboard LED) */ - ldr r0, OMAP5910_GPIO_BASE - ldr r1, GPIO_OUTPUT - strh r1, [r0, #0x04] - ldr r1, GPIO_DIRECTION - strh r1, [r0, #0x08] - - /* EnablePeripherals */ - ldr r0, OMAP5910_MPU_CLKM_BASE @ CLOCK unit - mov r1, #0x0001 @ Peripheral enable - strh r1, [r0, #0x14] - - /* Program LED Pulse Generator */ - ldr r0, OMAP5910_LPG1_BASE @ 1st LED Pulse Generator - mov r1, #0x7F @ Set obscure frequency in - strb r1, [r0, #0x00] @ LCR - mov r1, #0x01 @ Enable clock (CLK_EN) in - strb r1, [r0, #0x04] @ PMR - - /* TIPB Lock UART1 */ - ldr r0, OMAP5910_TIPB_SWITCHES_BASE @ prepare base of TIPB switches - mov r1, #1 @ ARM allocated - strh r1, [r0,#0x04] @ clear IRQ line and status bits - strh r1, [r0,#0x00] - ldrh r1, [r0,#0x04] - - /* Disable watchdog */ - ldr r0, OMAP5910_MPU_WD_TIMER_BASE - mov r1, #0xf5 - strh r1, [r0, #0x8] - mov r1, #0xa0 - strh r1, [r0, #0x8] - - /* Enable MCLK */ - ldr r0, OMAP5910_ULPD_PWR_MNG_BASE - mov r1, #0x6 - strh r1, [r0, #0x34] - strh r1, [r0, #0x34] - - /* Setup clock divisors */ - ldr r0, OMAP5910_ULPD_PWR_MNG_BASE @ base of ULDPL DPLL1 register - - mov r1, #0x0010 @ set PLL_ENABLE - orr r1, r1, #0x2000 @ set IOB to new locking - strh r1, [r0] @ write - -ulocking: - ldrh r1, [r0] @ get DPLL value - tst r1, #1 - beq ulocking @ while LOCK not set - - /* EMIF init */ - ldr r0, OMAP5910_MPU_TC_BASE - ldrh r1, [r0, #0x0c] @ EMIFS_CONFIG_REG - bic r1, r1, #0x0c @ pwr down disabled, flash WP - orr r1, r1, #0x01 - str r1, [r0, #0x0c] - - ldr r1, VAL_EMIFS_CS0_CONFIG - str r1, [r0, #0x10] @ EMIFS_CS0_CONFIG - ldr r1, VAL_EMIFS_CS1_CONFIG - str r1, [r0, #0x14] @ EMIFS_CS1_CONFIG - ldr r1, VAL_EMIFS_CS2_CONFIG - str r1, [r0, #0x18] @ EMIFS_CS2_CONFIG - ldr r1, VAL_EMIFS_CS3_CONFIG - str r1, [r0, #0x1c] @ EMIFS_CS3_CONFIG - ldr r1, VAL_EMIFS_DYN_WAIT - str r1, [r0, #0x40] @ EMIFS_CFG_DYN_WAIT - - /* Setup SDRAM */ - ldr r1, VAL_EMIFF_SDRAM_CONFIG - str r1, [r0, #0x20] @ EMIFF_SDRAM_CONFIG - ldr r1, VAL_EMIFF_SDRAM_CONFIG2 - str r1, [r0, #0x3c] @ EMIFF_SDRAM_CONFIG2 - ldr r1, VAL_EMIFF_MRS - str r1, [r0, #0x24] @ EMIFF_MRS - /* SDRAM needs 100us to stabilize */ - mov r0, #0x4000 -sdelay: - subs r0, r0, #0x1 - bne sdelay - - /* back to arch calling code */ - mov pc, lr -.end diff --git a/board/voiceblue/voiceblue.c b/board/voiceblue/voiceblue.c deleted file mode 100644 index 5f8af2b..0000000 --- a/board/voiceblue/voiceblue.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - *((volatile unsigned char *) VOICEBLUE_LED_REG) = 0xaa; - - /* arch number of VoiceBlue board */ - gd->bd->bi_arch_number = MACH_TYPE_VOICEBLUE; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0x10000100; - - return 0; -} - -int dram_init(void) -{ - *((volatile unsigned short *) VOICEBLUE_LED_REG) = 0xff; - - /* Take the Ethernet controller out of reset and wait - * for the EEPROM load to complete. */ - *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80; - udelay(10); /* doesn't work before timer_init call */ - *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80; - udelay(500); - - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return 0; -} - -int misc_init_r(void) -{ - *((volatile unsigned short *) VOICEBLUE_LED_REG) = 0x55; - - return 0; -} - -int board_late_init(void) -{ - *((volatile unsigned char *) VOICEBLUE_LED_REG) = 0x00; - - return 0; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC91111 - rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); -#endif - return rc; -} -#endif diff --git a/boards.cfg b/boards.cfg index f70afe2..b4d82db 100644 --- a/boards.cfg +++ b/boards.cfg @@ -68,7 +68,6 @@ cm4008 arm arm920t - - cm41xx arm arm920t - - ks8695 VCMA9 arm arm920t vcma9 mpl s3c24x0 smdk2410 arm arm920t - samsung s3c24x0 -voiceblue arm arm925t omap1510inn arm arm925t - ti integratorap_cm926ejs arm arm926ejs integrator armltd - integratorap integratorcp_cm926ejs arm arm926ejs integrator armltd - integratorcp diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 087e0e1..144edaa 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
Board Arch CPU removed Commit last known maintainer/contact ============================================================================= +voiceblue arm arm925t - 2011-07-17 versatile arm ARM926EJS - 2011-07-17 Peter Pearse peter.pearse@arm.com smdk2400 arm arm920t - 2011-07-17 Gary Jennejohn garyj@denx.de sbc2410x arm arm920t - 2011-07-17 diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h deleted file mode 100644 index c258030..0000000 --- a/include/configs/voiceblue.h +++ /dev/null @@ -1,241 +0,0 @@ -/* - * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl - * - * Configuation settings for the TI OMAP VoiceBlue board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <configs/omap1510.h> - -#define CONFIG_ARM925T 1 /* This is an arm925t CPU */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ -#define CONFIG_OMAP1510 1 /* which is in a 5910 */ - -/* Input clock of PLL */ -#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz */ -#define CONFIG_XTAL_FREQ 12000000 /* 12MHz */ - -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - -#define CONFIG_MISC_INIT_R /* There is nothing to really init */ -#define BOARD_LATE_INIT /* but we flash the LEDs here */ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 0x10000000 -#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) -#define PHYS_FLASH_1 0x0000000 - -#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) - -/* - * Environment settings - */ -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) -#define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_ENV_SECT_SIZE (64 * 1024) -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE - -#define CONFIG_ENV_OVERWRITE - -/* - * Size of malloc() pool and stack - */ -#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) -#define CONFIG_STACKSIZE (1 * 1024 * 1024) - -/* - * Hardware drivers - */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) -#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE - -#define CONFIG_NET_MULTI -#define CONFIG_SMC91111 -#define CONFIG_SMC91111_BASE 0x08000300 - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 512 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE - -#define CONFIG_HARD_I2C -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 1 -#define CONFIG_DRIVER_OMAP1510_I2C - -#define CONFIG_RTC_DS1307 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 - - -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - - -/* - * Command line configuration - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_BDI -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_IMI -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING -#define CONFIG_CMD_RUN - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH - -#define CONFIG_LOOPW - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */ -#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ -#define CONFIG_SYS_AUTOLOAD "n" -#define CONFIG_BOOTCOMMAND "run nboot" -#define CONFIG_PREBOOT "run setup" -#define CONFIG_EXTRA_ENV_SETTINGS \ - "silent=1\0" \ - "ospart=0\0" \ - "bootfile=/boot/uImage\0" \ - "setpart=" \ - "if test -n $swapos; then " \ - "setenv swapos; saveenv; " \ - "if test $ospart -eq 0; then " \ - "setenv ospart 1; " \ - "else " \ - "setenv ospart 0; " \ - "fi; " \ - "fi\0" \ - "setup=setenv bootargs console=ttyS0,$baudrate " \ - "mtdparts=$mtdparts\0" \ - "nfsargs=setenv bootargs $bootargs " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \ - "nfsroot=$rootpath root=/dev/nfs\0" \ - "flashargs=run setpart; setenv bootargs $bootargs " \ - "root=mtd:data$ospart ro " \ - "rootfstype=jffs2\0" \ - "initrdargs=setenv bootargs $bootargs " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \ - "fboot=run flashargs; chpart data$ospart; fsload; bootm\0" \ - "mboot=bootp; run initrdargs; tftp; bootm\0" \ - "nboot=bootp; run nfsargs; tftp; bootm\0" - -#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */ - -#if 1 /* feel free to disable for development */ -#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ -#define CONFIG_AUTOBOOT_PROMPT "\nVoiceBlue Enterprise - booting...\n" -#define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */ -#endif - -/* - * Partitions (mtdparts command line support) - */ -#define CONFIG_CMD_MTDPARTS -#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -#define CONFIG_FLASH_CFI_MTD -#define MTDIDS_DEFAULT "nor0=physmap-flash.0" -#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \ - "256k(u-boot),64k(env),64k(r_env),16192k(data0),-(data1)" - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_PROMPT "# " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1) -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \ - (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)) -#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x400000) - -/* - * The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1. - * This time is further subdivided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ -#define CONFIG_SYS_HZ 1000 - -#define OMAP5910_DPLL_DIV 1 -#define OMAP5910_DPLL_MUL \ - ((CONFIG_SYS_CLK_FREQ * (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ) - -#define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */ -#define OMAP5910_LCD_DIV 2 /* CKL/4 */ -#define OMAP5910_ARM_DIV 0 /* CKL/1 */ -#define OMAP5910_DSP_DIV 0 /* CKL/1 */ -#define OMAP5910_TC_DIV 1 /* CKL/2 */ -#define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */ -#define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */ - -#define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b Clock Enable */ -#define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \ - (OMAP5910_LCD_DIV << 2) | \ - (OMAP5910_ARM_DIV << 4) | \ - (OMAP5910_DSP_DIV << 6) | \ - (OMAP5910_TC_DIV << 8) | \ - (OMAP5910_DSP_MMU_DIV << 10) | \ - (OMAP5910_ARM_TIM_SEL << 12)) - -#define VOICEBLUE_LED_REG 0x04030000 - -#endif /* __CONFIG_H */