
Hi Nishanth,
On 14:15-20230901, Nishanth Menon wrote:
On 12:32-20230901, Manorit Chawdhry wrote:
The documentation is based off J7200 documentation tailored for J721S2.
You can drop the documentation based off j7200... Just state this documentation is for J721S2.
TRM for J721S2: https://www.ti.com/lit/pdf/spruj28 Product Page: https://www.ti.com/product/TDA4AL-Q1
Reviewed-by: Neha Malcom Francis n-francis@ti.com Signed-off-by: Manorit Chawdhry m-chawdhry@ti.com
doc/board/ti/j721s2_evm.rst | 298 ++++++++++++++++++++++++++++++++++++++++++++ doc/board/ti/k3.rst | 1 + 2 files changed, 299 insertions(+)
Thanks for including am68_sk documentation
diff --git a/doc/board/ti/j721s2_evm.rst b/doc/board/ti/j721s2_evm.rst new file mode 100644 index 000000000000..6b091ad37578 --- /dev/null +++ b/doc/board/ti/j721s2_evm.rst @@ -0,0 +1,298 @@ +.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +.. sectionauthor:: Manorit Chawdhry m-chawdhry@ti.com
+J721S2 and AM68 Platforms +=========================
+Introduction: +------------- +The J721S2 family of SoCs are part of K3 Multicore SoC architecture platform +targeting automotive applications. They are designed as a low power, high +performance and highly integrated device architecture, adding significant +enhancement on processing power, graphics capability, video and imaging +processing, virtualization and coherent memory support.
+The AM68 Starter Kit/Evaluation Module (EVM) is based on the J721S2 family +of SoCs. They are designed for machine vision, traffic monitoring, retail +automation, and factory automation.
+The device is partitioned into three functional domains, each containing +specific processing cores and peripherals:
+1. Wake-up (WKUP) domain:
* ARM Cortex-M4F processor, runs TI Foundational Security (TIFS)
+2. Microcontroller (MCU) domain:
* Dual core ARM Cortex-R5F processor, runs device management
and SoC early boot
Just use a single space for spacing?
+3. MAIN domain:
* Dual core 64-bit ARM Cortex-A72, runs HLOS
just use a single space?
+More info can be found in TRM: https://www.ti.com/lit/pdf/spruj28
[...]
+Target Images +-------------- +In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC +variant (GP, HS-FS, HS-SE) requires a different source for these files.
- GP
* tiboot3-j721s2-gp-evm.bin from :ref:`step 3.1 <j721s2_evm_rst_u_boot_r5>`
* tispl.bin_unsigned, u-boot.img_unsigned from :ref:`step 3.2 <j721s2_evm_rst_u_boot_a72>`
- HS-FS
* tiboot3-j721s2-hs-fs-evm.bin from :ref:`step 3.1 <j721s2_evm_rst_u_boot_r5>`
* tispl.bin, u-boot.img from :ref:`step 3.2 <j721s2_evm_rst_u_boot_a72>`
- HS-SE
* tiboot3-j721s2-hs-evm.bin from :ref:`step 3.1 <j721s2_evm_rst_u_boot_r5>`
* tispl.bin, u-boot.img from :ref:`step 3.2 <j721s2_evm_rst_u_boot_a72>`
Use a single space? to separate. I think we should probably clean up the other docs as follow on.
+Image formats: +--------------
[...]
+Switch Setting for Boot Mode +----------------------------
+Boot Mode pins provide means to select the boot mode and options before the +device is powered up. After every POR, they are the main source to populate +the Boot Parameter Tables.
+Boot Mode Pins for J721S2
J721S2-EVM ?
+^^^^^^^^^^^^^^^^^^^^^^^^^
[...]
+For SW8 and SW9, the switch state in the "ON" position = 1.
+Boot Mode Pins for AM68
SK-AM68 ?
[..]
+Debugging U-Boot +----------------
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for +detailed setup information.
+.. warning::
- **OpenOCD support since**: v0.12.0
- If the default package version of OpenOCD in your development
- environment's distribution needs to be updated, it might be necessary to
- build OpenOCD from the source.
+.. include:: k3.rst
- :start-after: .. k3_rst_include_start_openocd_connect_XDS110
- :end-before: .. k3_rst_include_end_openocd_connect_XDS110
+To start OpenOCD and connect to the board
+.. code-block:: bash
- openocd -f board/ti_j721s2evm.cfg
This will work for the evm, but the am68-SK doesn't seem to have XDS110 on board.
You will need the following sections to help debug on SK-AM68: k3_rst_include_start_openocd_connect_cti20 and: k3_rst_include_start_openocd_cfg_external_intro
and: openocd_connect.cfg:
.. code-block:: tcl
# TUMPA example: # http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User%27s_Manual source [find interface/ftdi/tumpa.cfg]
transport select jtag
# default JTAG configuration has only SRST and no TRST reset_config srst_only srst_push_pull
# delay after SRST goes inactive adapter srst delay 20
if { ![info exists SOC] } { # Set the SoC of interest set SOC j721s2 }
source [find target/ti_k3.cfg]
ftdi tdo_sample_edge falling
# Speeds for FT2232H are in multiples of 2, and 32MHz is tops # max speed we seem to achieve is ~20MHz.. so we pick 16MHz adapter speed 16000
Will be sending a v4 with the fixes. Thanks for reviewing!
Regards, Manorit
diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst index 5f9bd4dfcbe9..423d55526dc5 100644 --- a/doc/board/ti/k3.rst +++ b/doc/board/ti/k3.rst @@ -36,6 +36,7 @@ K3 Based SoCs am65x_evm j7200_evm j721e_evm
- j721s2_evm
Boot Flow Overview
-- 2.41.0
-- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D