On 01/06/2012 04:17 AM, Xiangfu Liu wrote:
Signed-off-by: Xiangfu Liu xiangfu@openmobilefree.net
arch/mips/cpu/xburst/cpu.c | 4 + arch/mips/cpu/xburst/start_spl.S | 65 ++++++++++++++++++++ drivers/mtd/nand/jz4740_nand.c | 40 +++++++++++- include/configs/qi_lb60.h | 3 + nand_spl/board/qi/qi_lb60/Makefile | 112 ++++++++++++++++++++++++++++++++++ nand_spl/board/qi/qi_lb60/nand_spl.c | 37 +++++++++++ nand_spl/board/qi/qi_lb60/u-boot.lds | 63 +++++++++++++++++++ 7 files changed, 321 insertions(+), 3 deletions(-) create mode 100644 arch/mips/cpu/xburst/start_spl.S create mode 100644 nand_spl/board/qi/qi_lb60/Makefile create mode 100644 nand_spl/board/qi/qi_lb60/nand_spl.c create mode 100644 nand_spl/board/qi/qi_lb60/u-boot.lds
We are transitioning from nand_spl/ to spl/. Please try to work within the new infrastructure. You may run into problems with size in spl/, due to gc-sections not removing strings on components you don't need -- I plan to fix those issues (for NAND), hopefully this merge window, by requiring all files to be explicitly asked for. Feel free to fix them first if you'd like. :-)
diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c index e976341..afd166c 100644 --- a/arch/mips/cpu/xburst/cpu.c +++ b/arch/mips/cpu/xburst/cpu.c @@ -42,6 +42,8 @@ : \ : "i" (op), "R" (*(unsigned char *)(addr)))
+#ifndef CONFIG_NAND_SPL
void __attribute__((weak)) _machine_restart(void) { struct jz4740_wdt *wdt = (struct jz4740_wdt *)JZ4740_WDT_BASE; @@ -109,6 +111,8 @@ void invalidate_dcache_range(ulong start_addr, ulong stop) cache_op(Hit_Invalidate_D, addr); }
+#endif
void flush_icache_all(void) { u32 addr, t = 0; diff --git a/arch/mips/cpu/xburst/start_spl.S b/arch/mips/cpu/xburst/start_spl.S new file mode 100644 index 0000000..f137ccd --- /dev/null +++ b/arch/mips/cpu/xburst/start_spl.S @@ -0,0 +1,65 @@ +/*
- Startup Code for MIPS32 XBURST CPU-core
- Copyright (c) 2010 Xiangfu Liu xiangfu@sharism.cc
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 3 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <config.h> +#include <version.h> +#include <asm/regdef.h> +#include <asm/mipsregs.h> +#include <asm/addrspace.h> +#include <asm/cacheops.h>
+#include <asm/jz4740.h>
- .set noreorder
- .globl _start
- .text
+_start:
- .word JZ4740_NANDBOOT_CFG /* fetched during NAND Boot */
+reset:
- /*
* STATUS register* CU0=UM=EXL=IE=0, BEV=ERL=1, IP2~7=1*/- li t0, 0x0040FC04
- mtc0 t0, CP0_STATUS
- /*
* CAUSE register* IV=1, use the specical interrupt vector (0x200)*/- li t1, 0x00800000
- mtc0 t1, CP0_CAUSE
- bal 1f
nop- .word _GLOBAL_OFFSET_TABLE_
+1:
- move gp, ra
- lw t1, 0(ra)
- move gp, t1
- la sp, 0x80004000
- la t9, nand_spl_boot
- j t9
nop
Shinya, do the MIPS parts look OK?
+include $(TOPDIR)/config.mk
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_NAND_SPL_TEXT_BASE) +AFLAGS += -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_NAND_SPL -O2
Why -O2 and not the -Os that you should already be inheriting from config.mk?
+# The JZ4740 CPU can load two areas of data from NAND flash to internal SRAM, +# one is the normal area up to 8KB starting from NAND flash address 0, the +# other is the backup area up to 8KB starting from NAND flash address 0x2000.
+# After reset, the boot program will first read the normal area data from NAND +# flash using hardware Reed-Solomon ECC. If no ECC error is detected or ECC +# error is correctable, the boot program then branches to internal SRAM at 4 +# bytes offset. ff it detects an uncorrectable ECC error, it will continue to +# read the backup area of data from NAND flash using hardware Reed-Solomon ECC.
Why must the payload come at offset 256K, rather than 16K?
+# those 'dd' commands is for create such two 8KB for JZ4740 CPU +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl.bin
- dd bs=1024 count=8 if=/dev/zero of=$(nandobj)junk1
- cat $< $(nandobj)junk1 > $(nandobj)junk2
- dd bs=1024 count=8 if=$(nandobj)junk2 of=$(nandobj)junk3
- cat $(nandobj)junk3 $(nandobj)junk3 > $(nandobj)junk4
- dd bs=1024 count=256 if=/dev/zero of=$(nandobj)junk5
- cat $(nandobj)junk4 $(nandobj)junk5 > $(nandobj)junk6
- dd bs=1024 count=256 if=$(nandobj)junk6 of=$@
- rm -f $(nandobj)junk*
This is overcomplicated and difficult to follow.
Try something like this:
# This target is misnamed, but that's the toplevel Makefile's fault $(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl.bin dd if=$< of=$@ conv=sync bs=8192 count=1 dd if=$< of=$@ conv=sync,notrunc oflag=append \ bs=8192 count=1 dd if=/dev/zero of=$@ conv=sync,notrunc oflag=append \ bs=245760 count=1
Or consider using --pad-to or the linker script to add the 8K padding (also add an assert for too-large like arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds does). If you also get rid of the need to pad to 256k, this step then becomes "cat $< $< > $@".
diff --git a/nand_spl/board/qi/qi_lb60/u-boot.lds b/nand_spl/board/qi/qi_lb60/u-boot.lds new file mode 100644 index 0000000..7042388 --- /dev/null +++ b/nand_spl/board/qi/qi_lb60/u-boot.lds @@ -0,0 +1,63 @@ +/*
- (C) Copyright 2005
- Ingenic Semiconductor, jlwei@ingenic.cn
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
+OUTPUT_ARCH(mips) +ENTRY(_start) +SECTIONS +{
- . = 0x00000000;
include/configs/qi_lb60.h says CONFIG_NAND_SPL_TEXT_BASE is 0x80000000, not zero.
-Scott