This describes requirement of e500 and e500v2 processor to support external debugger.
It also provide an insight of the configuration switch required and their description.
Signed-off-by: Radu Lazarescu radu.lazarescu@freescale.com Signed-off-by: Marius Grigoras marius.grigoras@freescale.com Signed-off-by: Prabhakar Kushwaha prabhakar@freescale.com --- Based upon git://git.denx.de/u-boot.git branch master
Changes for v2: - Recreated README.mpc85xx - Added #define in README
Tested on - SoC having E500 Family processor (P1010RDB, BSC9131RDB) - SoC having E500MC Family processor (P4080DS, P3041DS)
README | 14 ++++++++++++++ doc/README.mpc85xx | 23 +++++++++++++++++++++++ 2 files changed, 37 insertions(+), 0 deletions(-) create mode 100644 doc/README.mpc85xx
diff --git a/README b/README index 8964672..48e50ed 100644 --- a/README +++ b/README @@ -3347,6 +3347,20 @@ Low Level (hardware related) configuration options: be used if available. These functions may be faster under some conditions but may increase the binary size.
+E500 (MPC85xx) External Debug Support +------------------------------------- +-CONFIG_E500 + Enables BOOKE e500 family.It includes e500, e500v2 e500mc, + e5500 processor etc. + +- CONFIG_SYS_PPC_E500_DEBUG_TLB + Enables a temporary TLB entry to be used during boot to work + around limitations in e500v1 and e500v2 external debugger + support. This reduces the portions of the boot code where + breakpoints and single stepping do not work. The value of this + symbol should be set to the TLB1 entry to be used for this + purpose. + Freescale QE/FMAN Firmware Support: -----------------------------------
diff --git a/doc/README.mpc85xx b/doc/README.mpc85xx new file mode 100644 index 0000000..dbd74be --- /dev/null +++ b/doc/README.mpc85xx @@ -0,0 +1,23 @@ +External Debug Support +---------------------- + +Freescale's e500v1 and e500v2 cores (used in mpc85xx chips) have some +restrictions on external debugging (JTAG). In particular, for the debugger to +be able to receive control after a single step or breakpoint: + - MSR[DE] must be set + - A valid opcode must be fetchable, through the MMU, from the debug + exception vector (IVPR + IVOR15). + +To maximize the time during which this requirement is met, U-Boot sets MSR[DE] +immediately on entry and keeps it set. It also uses a temporary TLB to keep a +mapping to a valid opcode at the debug exception vector, even if we normally +don't support exception vectors being used that early, and that's not the area +where U-Boot currently executes from. + +Note that there may still be some small windows where debugging will not work, +such as in between updating IVPR and IVOR15. + +Config Switches: +---------------- + +Please refer README section "MPC85xx External Debug Support"