On Saturday 18 March 2017 12:16 AM, Simon Glass wrote:
Hi,
On 13 February 2017 at 01:08, Lokesh Vutla lokeshvutla@ti.com wrote:
On Monday 13 February 2017 01:04 PM, Vignesh R wrote:
Use CONFIG_IS_ENABLED() macro to check whether OF_LIBFDT is enabled, so that code block is compiled irrespective of SPL or U-Boot build depending on CONFIG_SPL_OF_LIBFDT(for SPL) or CONFIG_OF_LIBFDT(for U-Boot).
Signed-off-by: Vignesh R vigneshr@ti.com
Reviewed-by: Lokesh Vutla lokeshvutla@ti.com
Thanks and regards, Lokesh
Unfortunately this breaks boards which use SPL and OF_CONTROL:
06: dtoc: make ScanTree recurse into subnodes aarch64: + xilinx_zynqmp_zc1751_xm018_dc4 xilinx_zynqmp_zcu102 xilinx_zynqmp_zc1751_xm015_dc1 xilinx_zynqmp_zc1751_xm019_dc5 xilinx_zynqmp_zc1751_xm016_dc2 xilinx_zynqmp_ep xilinx_zynqmp_zcu102_revB arm: + socfpga_de0_nano_soc uniphier_pro4 uniphier_ld4_sld8 zynq_zc770_xm010 zynq_zc770_xm012 zynq_zc706 evb-rk3288 socfpga_arria5 zynq_zybo rock2 socfpga_socrates uniphier_sld3 zynq_microzed socfpga_sr1500 tinker-rk3288 zynq_zed socfpga_de1_soc firefly-rk3288 sama5d2_xplained_spiflash topic_miami sama5d2_xplained_mmc socfpga_sockit zynq_zc702 socfpga_is1 zynq_picozed fennec-rk3288 zynq_zc770_xm011 zynq_zc770_xm013 popmetal-rk3288 socfpga_mcvevk topic_miamiplus socfpga_cyclone5 socfpga_vining_fpga uniphier_pxs2_ld6b microblaze: + microblaze-generic x86: + qemu-x86_64 chromebook_link64 +lib/built-in.o: In function `fdtdec_get_addr_size_fixed': +build/../lib/fdtdec.c:117: undefined reference to `fdt_translate_address' +make[2]: *** [spl/u-boot-spl] Error 1 +make[1]: *** [spl/u-boot-spl] Error 2 +build/../lib/fdtdec.
You can move the position of fdt_support.o in common/Makefile to fix this.
It also bloats SPL on many boards which currently don't need address translation. For example firefly-rk3288 goes from ~20KB to ~26KB.
Can you add an option to enable address translation in SPL perhaps?
Yes, there is OF_TRANSLATE. I have posted v2 with the changes: https://patchwork.ozlabs.org/patch/740789/