Hi!
So this is my 4th posting regarding the Candence SPI driver on SoCFPGA.
Again, SPI NOR flash is working. At least on SoCrates and on another custom SoCFPGA based board. The main change in this version is, that the Cadence driver now is a driver model (DM) based driver. And this needs the DT support which I posted just before.
One of the reasons to enable DT support in SoCFPGA is, that I need to support multiple different SPI controllers for this platform. This is the QSPI Cadence controller and the Designware SPI master controller. Both are implemented in the SoCFPGA. And enabling both controllers is only possible by using the new driver model (DM). The DM SPI code only supports DT based probing. So it was easier to move SoCFPGA to DT than to add the (deprecated) platform-data based probing to the DM SPI suport.
Note that I have patches to support the Designware SPI master controller also via DM in the queue. I'll post them shortly.
Thanks, Stefan
Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@altera.com Cc: Vince Bridgers vbridger@altera.com Cc: Marek Vasut marex@denx.de Cc: Pavel Machek pavel@denx.de Cc: Simon Glass sjg@chromium.org Cc: Jagannadha Sutradharudu Teki jagannadh.teki@gmail.com