15 Dec
2019
15 Dec
'19
1:44 a.m.
On Tue, Dec 10, 2019 at 10:11 PM Bin Meng bmeng.cn@gmail.com wrote:
On Mon, Dec 9, 2019 at 8:41 AM Simon Glass sjg@chromium.org wrote:
Adds a driver for the Apollo Lake Primary-to-sideband bus. This supports various child devices. It supposed both device tree and of-platdata.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v7:
- Update comment in apl_p2sb_early_init()
Changes in v6: None Changes in v5: None Changes in v4:
- Detect zero mmio address
- Use BIT() macro bit more
- apollolake -> Apollo Lake
Changes in v3:
- Use pci_get_devfn()
Changes in v2: None
arch/x86/cpu/apollolake/Makefile | 1 + arch/x86/cpu/apollolake/p2sb.c | 166 +++++++++++++++++++++++++++++++ 2 files changed, 167 insertions(+) create mode 100644 arch/x86/cpu/apollolake/p2sb.c
Reviewed-by: Bin Meng bmeng.cn@gmail.com
applied to u-boot-x86/next, thanks!