On 10/20/2012 8:52 AM, Stefano Babic wrote:
Am 04/10/2012 03:47, schrieb Troy Kisky:
This makes the dcd table options as well for v2. Also, the header offset is no longer right before the code starts.
Before this patch we have 000000 402000d1 17800000 00000000 177ffc2c 000010 177ffc20 177ffc00 00000000 00000000 000020 177ff800 00042b58 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 00000000 00000000 00000000 000360 00000000 00000000 00000000 00000000
0003f0 00000000 00000000 00000000 00000400 000400 ea000014 e59ff014 e59ff014 e59ff014
Notice offset 3fc contains 0x400. This is the header offset. There is no reason for this to be in the file, and I have removed it.
After this patch we have 000000 402000d1 17800000 00000000 177ffcd8 000010 177ffccc 177ffcac 00000000 00000000 000020 177ff8ac 000426ac 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 ea000014 e59ff014 e59ff014 000360 e59ff014 e59ff014 e59ff014 e59ff014
Notice the zeros between 0x354 and 0x3fb have been removed.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
my test with this patch was not successful. I have tested it on a mx53loco, and the board cannot boot. It stops after printing the RAM size:
U-Boot 2012.10-00226-g673b6b8 (Oct 20 2012 - 17:40:07)
Board: MX53 LOCO I2C: ready DRAM: 1 GiB
Everything works fine without the patch (patches 1-7 already applied, too). I wanted to test on V1 SOCs, too, but I stopped after seeing that on a MX53 is not working.
Best regards, Stefano Babic
I've tested this patch on a mx51 boards as well and it worked fine there.
For testing purposes, can you see if this change helps any? Perhaps the rom isn't loading all the code, and this will load a little more.
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index e49ca0c..4b303f1 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -86,6 +86,12 @@ SECTIONS __bss_end__ = .; }
+ .zdata1 : { + . = ALIGN(512); + LONG(0xdeadbeef); + FILL(0xefbeadde); + . = ALIGN(512); + } /DISCARD/ : { *(.dynstr*) } /DISCARD/ : { *(.dynamic*) } /DISCARD/ : { *(.plt*) }