On Sun, Sep 29, 2013 at 4:49 PM, Otavio Salvador otavio@ossystems.com.br wrote:
On Sun, Sep 29, 2013 at 4:45 PM, Benoît Thébaudeau benoit.thebaudeau@advansee.com wrote:
On Sunday, September 29, 2013 9:42:44 PM, Otavio Salvador wrote:
On Sun, Sep 29, 2013 at 4:25 PM, Benoît Thébaudeau benoit.thebaudeau@advansee.com wrote: ...
Hence, gpio_get_value() should be left unchanged (using PSR in all cases), and SION should be set for all GPIOs in the i.MX6 pin definition header files.
I just does not follow why this preferred against Fabio's proposed patch to read from DR?
Because in case of a level conflict between the GPIO output and some other hardware on the board, one would expect gpio_get_value() to return the actual pin level, and not the level that the GPIO output tries (but possibly fails) to apply on this pin.
Ahh now I see. I agree :-)
I sent the patch to fix this adding the flag to the GPIO pins.
I tested it and it works fine indeed. The patch is awaiting for approval as it is a little big. The commitlog is below for reference:
mx6: Add IOMUX_CONFIG_SION flag to all GPIO pins
The IOMUX_CONFIG_SION allows for reading PAD value from PSR register.
The following quote from the datasheet:
,---- | ... | 28.4.2.2 GPIO Write Mode | The programming sequence for driving output signals should be as follows: | 1. Configure IOMUX to select GPIO mode (Via IOMUXC), also enable SION if need | to read loopback pad value through PSR | 2. Configure GPIO direction register to output (GPIO_GDIR[GDIR] set to 1b). | 3. Write value to data register (GPIO_DR). | ... `----
This fixes the gpio_get_value to properly work when a GPIO is set for output and has no conflicts.
Thanks for Benoît Thébaudeau benoit.thebaudeau@advansee.com, Fabio Estevam fabio.estevam@freescale.com and Eric Bénard eric@eukrea.com for helping to properly trace this down.
Signed-off-by: Otavio Salvador otavio@ossystems.com.br
Again, thanks for the help on this.