Modeled after the MPC8540DS code; this will allow us to use a common initdram() once that is available. There should be no functional change.
Signed-off-by: Becky Bruce beckyb@kernel.crashing.org --- board/mpc8540eval/mpc8540eval.c | 64 +++++++++++++++++++++----------------- 1 files changed, 35 insertions(+), 29 deletions(-)
diff --git a/board/mpc8540eval/mpc8540eval.c b/board/mpc8540eval/mpc8540eval.c index 054d644..f1ab360 100644 --- a/board/mpc8540eval/mpc8540eval.c +++ b/board/mpc8540eval/mpc8540eval.c @@ -64,41 +64,15 @@ int checkboard (void) return (0); }
-phys_size_t initdram (int board_type) +void sdram_init(void) { - long dram_size = 0; - -#if !defined(CONFIG_RAM_AS_FLASH) +#if !defined(CONFIG_RAM_AS_FLASH) /* LocalBus is not emulating flash */ volatile fsl_lbc_t *lbc = LBC_BASE_ADDR; + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); sys_info_t sysinfo; uint temp_lbcdll = 0; -#endif -#if !defined(CONFIG_RAM_AS_FLASH) || defined(CONFIG_DDR_DLL) - volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -#endif
-#if defined(CONFIG_DDR_DLL) - uint temp_ddrdll = 0;
- /* Work around to stabilize DDR DLL */ - temp_ddrdll = gur->ddrdllcr; - gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000; - asm("sync;isync;msync"); -#endif - -#if defined(CONFIG_SPD_EEPROM) - dram_size = fsl_ddr_sdram(); - dram_size = setup_ddr_tlbs(dram_size / 0x100000); - dram_size *= 0x100000; -#else - dram_size = fixed_sdram (); -#endif - -#if defined(CONFIG_SYS_RAMBOOT) - return dram_size; -#endif - -#if !defined(CONFIG_RAM_AS_FLASH) /* LocalBus is not emulating flash */ get_sys_info(&sysinfo); /* if localbus freq is less than 66MHz,we use bypass mode,otherwise use DLL */ if(sysinfo.freqSystemBus/(CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV) < 66000000) { @@ -132,6 +106,38 @@ phys_size_t initdram (int board_type) lbc->mrtpr = CONFIG_SYS_LBC_MRTPR; asm("sync"); #endif +} + +phys_size_t initdram(int board_type) +{ + long dram_size = 0; + +#if !defined(CONFIG_RAM_AS_FLASH) || defined(CONFIG_DDR_DLL) + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); +#endif + +#if defined(CONFIG_DDR_DLL) + uint temp_ddrdll = 0; + + /* Work around to stabilize DDR DLL */ + temp_ddrdll = gur->ddrdllcr; + gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000; + asm("sync;isync;msync"); +#endif + +#if defined(CONFIG_SPD_EEPROM) + dram_size = fsl_ddr_sdram(); + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + dram_size *= 0x100000; +#else + dram_size = fixed_sdram(); +#endif + +#if defined(CONFIG_SYS_RAMBOOT) + return dram_size; +#endif + + sdram_init();
#if defined(CONFIG_DDR_ECC) {