
From: Tien Fong Chee tien.fong.chee@intel.com
Current watchdog reset is misplaced after for-loop status polling, so this poses a risk that watchdog can't be reset timely if polling taking longer than watchdog timeout. This patch moving the watchdog reset into polling to ensure the watchdog can be reset timely.
Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com
---
changes for v13 - Improved the commit messages.
changes for v12 - Improved the commit messages.
changes for v11 - No changes.
changes for v10 - This patch was split out from [PATCH v10 5/9] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA. --- drivers/fpga/socfpga_arria10.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c index b0abe1955c..9499d1a014 100644 --- a/drivers/fpga/socfpga_arria10.c +++ b/drivers/fpga/socfpga_arria10.c @@ -360,6 +360,7 @@ static int fpgamgr_program_poll_cd(void) printf("nstatus == 0 while waiting for condone\n"); return -EPERM; } + WATCHDOG_RESET(); }
if (i == FPGA_TIMEOUT_CNT) @@ -433,7 +434,6 @@ int fpgamgr_program_finish(void) printf("FPGA: Poll CD failed with error code %d\n", status); return -EPERM; } - WATCHDOG_RESET();
/* Ensure the FPGA entering user mode */ status = fpgamgr_program_poll_usermode();