[PATCH 07/10] arm: imx: imx8m: Map RAM as NS if PSCI provider

22 Dec 2022

In case U-Boot is a PSCI provider, map RAM explicitly as NS,
otherwise secondary cores crash with SError when attempting
to access RAM mapped as secure in EL2.
Signed-off-by: Marek Vasut marex@denx.de
---
Cc: "Ariel D'Alessandro" ariel.dalessandro@collabora.com
Cc: "NXP i.MX U-Boot Team" uboot-imx@nxp.com
Cc: "Ying-Chun Liu (PaulLiu)" paul.liu@linaro.org
Cc: Adam Ford aford173@gmail.com
Cc: Andrejs Cainikovs andrejs.cainikovs@toradex.com
Cc: Fabio Estevam festevam@gmail.com
Cc: Manoj Sai abbaraju.manojsai@amarulasolutions.com
Cc: Marcel Ziswiler marcel.ziswiler@toradex.com
Cc: Michael Trimarchi michael@amarulasolutions.com
Cc: Peng Fan peng.fan@nxp.com
Cc: Ricardo Salveti ricardo@foundries.io
Cc: Simon Glass sjg@chromium.org
Cc: Stefano Babic sbabic@denx.de
Cc: Tim Harvey tharvey@gateworks.com
Cc: Ye Li ye.li@nxp.com
---
 arch/arm/mach-imx/imx8m/soc.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 96c6e69aae4..706ba8509da 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -100,6 +100,12 @@ void set_wdog_reset(struct wdog_regs *wdog)
    setbits_le16(&wdog->wcr, WDOG_WDT_MASK | WDOG_WDZST_MASK);
 }
+#ifdef CONFIG_ARMV8_PSCI
+#define PTE_MAP_NS	PTE_BLOCK_NS
+#else
+#define PTE_MAP_NS	0
+#endif
+
 static struct mm_region imx8m_mem_map[] = {
    {
    	/* ROM */
@@ -122,7 +128,7 @@ static struct mm_region imx8m_mem_map[] = {
    	.phys = 0x180000UL,
    	.size = 0x8000UL,
    	.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-			 PTE_BLOCK_OUTER_SHARE
+			 PTE_BLOCK_OUTER_SHARE | PTE_MAP_NS
    }, {
    	/* TCM */
    	.virt = 0x7C0000UL,
@@ -130,14 +136,14 @@ static struct mm_region imx8m_mem_map[] = {
    	.size = 0x80000UL,
    	.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
    		 PTE_BLOCK_NON_SHARE |
-			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN | PTE_MAP_NS
    }, {
    	/* OCRAM */
    	.virt = 0x900000UL,
    	.phys = 0x900000UL,
    	.size = 0x200000UL,
    	.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-			 PTE_BLOCK_OUTER_SHARE
+			 PTE_BLOCK_OUTER_SHARE | PTE_MAP_NS
    }, {
    	/* AIPS */
    	.virt = 0xB00000UL,
@@ -152,7 +158,7 @@ static struct mm_region imx8m_mem_map[] = {
    	.phys = 0x40000000UL,
    	.size = PHYS_SDRAM_SIZE,
    	.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-			 PTE_BLOCK_OUTER_SHARE
+			 PTE_BLOCK_OUTER_SHARE | PTE_MAP_NS
 #ifdef PHYS_SDRAM_2_SIZE
    }, {
    	/* DRAM2 */
@@ -160,7 +166,7 @@ static struct mm_region imx8m_mem_map[] = {
    	.phys = 0x100000000UL,
    	.size = PHYS_SDRAM_2_SIZE,
    	.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-			 PTE_BLOCK_OUTER_SHARE
+			 PTE_BLOCK_OUTER_SHARE | PTE_MAP_NS
 #endif
    }, {
    	/* empty entrie to split table entry 5 if needed when TEEs are used */
-- 
2.35.1


    