Signed-off-by: Masahiro Yamada yamada.m@jp.panasonic.com ---
Changes in v2: - Fix umc_init.c too
arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_init.c | 6 +++--- arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c | 4 ++-- arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c | 6 +++--- arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c | 4 ++-- arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_init.c | 6 +++--- arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c | 4 ++-- 6 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_init.c b/arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_init.c index 68b9d5f..b83582f 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_init.c +++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_init.c @@ -11,7 +11,7 @@
#undef DPLL_SSC_RATE_1PER
-void dpll_init(void) +static void dpll_init(void) { u32 tmp;
@@ -42,7 +42,7 @@ void dpll_init(void) writel(tmp, SC_DPLLCTRL2); }
-void upll_init(void) +static void upll_init(void) { u32 tmp, clk_mode_upll, clk_mode_axosel;
@@ -82,7 +82,7 @@ void upll_init(void) writel(tmp, SC_UPLLCTRL); }
-void vpll_init(void) +static void vpll_init(void) { u32 tmp, clk_mode_axosel;
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c b/arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c index 8788916..6387352 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c +++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c @@ -43,8 +43,8 @@ static inline void umc_start_ssif(void __iomem *ssif_base) writel(0x00000001, ssif_base + UMC_DMDRST); }
-void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, - int size, int freq) +static void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, + int size, int freq) { if (freq == 1333) { writel(0x45990b11, dramcont + UMC_CMDCTLA); diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c index 2dcc089..1db90f8 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c +++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c @@ -11,7 +11,7 @@
#undef DPLL_SSC_RATE_1PER
-void dpll_init(void) +static void dpll_init(void) { u32 tmp;
@@ -46,7 +46,7 @@ void dpll_init(void) writel(tmp, SC_DPLLCTRL2); }
-void stop_mpll(void) +static void stop_mpll(void) { u32 tmp;
@@ -62,7 +62,7 @@ void stop_mpll(void) ; }
-void vpll_init(void) +static void vpll_init(void) { u32 tmp, clk_mode_axosel;
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c index 1973ab0..6b9aa74 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c +++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c @@ -52,8 +52,8 @@ static inline void umc_start_ssif(void __iomem *ssif_base) writel(0x00000001, ssif_base + UMC_DMDRST); }
-void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, - int size, int freq) +static void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, + int size, int freq) { writel(0x66bb0f17, dramcont + UMC_CMDCTLA); writel(0x18c6aa44, dramcont + UMC_CMDCTLB); diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_init.c b/arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_init.c index 4d87053..4b82700 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_init.c +++ b/arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_init.c @@ -9,7 +9,7 @@ #include <asm/arch/sc-regs.h> #include <asm/arch/sg-regs.h>
-void dpll_init(void) +static void dpll_init(void) { u32 tmp; /* @@ -54,7 +54,7 @@ void dpll_init(void) writel(tmp, SC_DPLLCTRL2); }
-void upll_init(void) +static void upll_init(void) { u32 tmp, clk_mode_upll, clk_mode_axosel;
@@ -94,7 +94,7 @@ void upll_init(void) writel(tmp, SC_UPLLCTRL); }
-void vpll_init(void) +static void vpll_init(void) { u32 tmp, clk_mode_axosel;
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c b/arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c index 2e0f9ae..d8285d0 100644 --- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c +++ b/arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c @@ -43,8 +43,8 @@ static inline void umc_start_ssif(void __iomem *ssif_base) writel(0x00000001, ssif_base + UMC_DMDRST); }
-void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, - int size, int freq) +static void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, + int size, int freq) { #ifdef CONFIG_DDR_STANDARD writel(0x55990b11, dramcont + UMC_CMDCTLA);