Hi Adam,
On 02/18/2015 03:58 AM, Adam YH Lee wrote:
The ECC scheme selection algorithm in OMAP GPMC appears to be left untested when BCH8 handling code was added. Running 'nandecc sw' defaults to HAM1 even if the board is using another scheme (ex. OMAP_ECC_BCH8_CODE_HW_DETECTION_SW on OMAP3). This results in unrecoverable ECC errors when reading data. This commit fixes the behavior by checking for CONFIG_BCH and using the scheme defined by CONFIG_NAND_OMAP_ECCSCHEME in the board configuration file.
This has been tested on Gumstix Overo (OMAP3).
Signed-off-by: Adam YH Lee adam.yh.lee@gmail.com
drivers/mtd/nand/omap_gpmc.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index fc64f48..5daf932 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -901,8 +901,13 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength) return -EINVAL; } } else {
#ifdef CONFIG_BCHerr = omap_select_ecc_scheme(nand, CONFIG_NAND_OMAP_ECCSCHEME,mtd->writesize, mtd->oobsize);#else
Couldn't we just use the CONFIG_NAND_OMAP_ECCSCHEME instead of OMAP_ECC_HAM1_CODE_SW here and omit the CONFIG_BCH define?
On the other hand I think the whole function omap_nand_switch_ecc() is wrong. AFAIR it should only be used on omap3 aka am35xx/dm37xx devices witch the nandecc command. These SoC do not have a ELM. Therefore I decided to say BCH8 on those devices is always 'HW ECC' when introduced BCH8 on omap3 first. Nowadays it is the so called BCH8_CODE_HW_DETECTION_SW. Coming from this mindset the right solution is to use some detection if the ELM is supported or not and switch in the HW part of omap_nand_switch_ecc() between OMAP_ECC_BCH8_CODE_HW and OMAP_ECC_BCH8_CODE_HW_DETECTION_SW.
Best regards
Andreas Bießmann