Hi Mathieu,
Subject: Re: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM
Any comments?
Yes, see:
Sorry, I missed your comment.
From my test just now, log below. For your uart not work proper, I think it is
the uart clk not setup
U-Boot SPL 2024.04-rc5-00388-g351988e2dce (Apr 07 2024 - 19:29:56 +0800) SOC: 0xa1009300 LC: 0x2040010 M33 prepare ok Normal Boot Trying to boot from BOOTROM Boot Stage: Primary boot image offset 0x8000, pagesize 0x200, ivt offset 0x0 Load image from 0x49800 by ROM_API NOTICE: BL31: v2.8(release):lf-6.6.3-1.0.0-10-gf12d90141 NOTICE: BL31: Built : 09:34:44, Mar 27 2024
U-Boot 2024.04-rc5-00388-g351988e2dce (Apr 07 2024 - 19:29:56 +0800)
Reset Status: POR
Could not read CPU frequency: -2 CPU: NXP i.MX93(52) Rev1.1 A55 at 0 MHz CPU: Industrial temperature grade (-40C to 105C) at 26C
Model: NXP i.MX93 11X11 EVK board DRAM: 2 GiB Core: 188 devices, 24 uclasses, devicetree: separate WDT: Started watchdog@42490000 with servicing every 1000ms (40s timeout) MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment
In: serial@44380000 Out: serial@44380000 Err: serial@44380000 switch to partitions #0, OK mmc1 is current device Net: Warning: ethernet@428a0000 (eth1) using random MAC address - 6a:c2:96:d2:68:a6 eth0: ethernet@42890000 [PRIME], eth1: ethernet@428a0000 Hit any key to stop autoboot: 0
I see you have: &lpuart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; clocks = <&clk IMX93_CLK_LPUART1_GATE>, <&clk IMX93_CLK_LPUART1_GATE>; clock-names = "ipg", "per"; status = "okay"; };
Could you please help give a look on your uart settings which not work with: https://lore.kernel.org/all/20240328-imx93-of-v2-v4-2-338d15a65c36@nxp.com/
Thanks, Peng.
https://lists.d/ enx.de%2Fpipermail%2Fu-boot%2F2024- March%2F549531.html&data=05%7C02%7Cpeng.fan%40nxp.com%7C46ad4 24ef2cb4c09f8b908dc56edad0a%7C686ea1d3bc2b4c6fa92cd99c5c301635% 7C0%7C0%7C638480826025692986%7CUnknown%7CTWFpbGZsb3d8eyJWI joiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C 0%7C%7C%7C&sdata=9oXIZF8Ihp1OfaDx3C%2Bcq9nstWJVhN8u3U7xQAhX2 2o%3D&reserved=0
Thanks,
Mathieu