On 04/11/2011 03:05 PM, Ben Gardiner wrote:
Hi Ben,
[...] @@ -143,20 +144,20 @@ int board_init(void) irq_init(); #endif
-#ifdef CONFIG_NAND_DAVINCI /* * NAND CS setup - cycle counts based on da850evm NAND timings in the * Linux kernel @ 25MHz EMIFA */ +#ifdef CONFIG_NAND_DAVINCI writel((DAVINCI_ABCR_WSETUP(0) |
DAVINCI_ABCR_WSTROBE(0) |
DAVINCI_ABCR_WSTROBE(1) |If WSTROBE is modified then the timings are no longer solely based on the NAND timings in arch/arm/mach-davinci/board-da850-evm.c in the Linux kernel. Can you add an amendment to the comment describing the motivation for the extra WSTROBE cycle?
Really this board will not use at all the board-da850-evm.c, but (no patches are yet pushed) it will have its own board configuration file (something like arch/arm/mach-davinci/ea20.c). I understand that if no timing structure is set into the davinci_nand_pdata in Linux, values set by the bootloader are not overwritten (this is the case for this board at the moment). Regarding setting the WSTROBE, I understood from manual (EMIFA) that WSTROBE and RSTROBE cannot be set to zero if the EMA_WAIT pin is used, as on this board.
Best regards, Stefano