Hello, In the PowerPC architecture and specifically a Freescale 8270 the HRCW word decides if U-boot is going to be booted from regions: HIMEM 0xFE00_0000-0xFFFF_FFFF or LOMEM 0x0000_0000-0x01FF_FFFF. The CIP field decides the exception vectors; physical address 0xFFFn_nnnn or physical address 0x000n_nnnn.
Now, in my current board range I have TEXT_BASE as 0xFFF0'0000 and CFG_FLASH_BASE as 0XFE00'0000. ( 32M ) I my world that makes sense since the flash is mapped in the same range as the bootloader.
The start.S file says that things will be fine as longs as we configure BR0 with the same boot ROM link address. Isn't TEXT_BASE the boot ROM link address?
In one of the TQM boards ( 8260 ) I see that TEXT_BASE is 0x4000'0000 and the FLASH_BASE is 0xFF80'0000. Here the TEXT_BASE is mapped to a totally different address than HIMEM/LOMEM, the exception vectors and the FLASH_BASE - How is that possible?
In other words - Could someone explain what the relationship is actually between TEXT_BASE, FLASH_BASE and the BR0 register settings are?
Thx // Matias