
8 Jan
2021
8 Jan
'21
4:58 p.m.
On Sun, Nov 22, 2020 at 01:03:44PM +0000, Hugh Cole-Baker wrote:
SPI flash on this machine is located on bus 1, default to using bus 1 for SPI flash and stop aliasing it to bus 0.
Signed-off-by: Hugh Cole-Baker sigmaris@gmail.com Suggested-by: Simon Glass sjg@chromium.org Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
Applied to u-boot/master, thanks!
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Tom