Re: [PATCH v2 1/2] arm: stm32mp: activate data cache in SPL and before relocation

On 4/3/20 11:25 AM, Patrick Delaunay wrote: [...]

diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 36a9205819..c22c1a9bbc 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -75,6 +75,12 @@ #define PKG_SHIFT 27 #define PKG_MASK GENMASK(2, 0)

+/*

• • early TLB into the .data section so that it not get cleared
• • with 16kB allignment (see TTBR0_BASE_ADDR_MASK)
• */

+u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000);

Can you early-malloc this one ? (why do you need this in __section("data") ?)

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