On Wed, Nov 13, 2019 at 4:51 PM Peter Robinson pbrobinson@gmail.com wrote:
Add initial support for Pinebook Pro laptop.
Hi Peter,
Specification
- Rockchip RK3399
- 4GB Dual-Channel LPDDR4
- SD card slot
- eMMC socket
- 128Mb SPI Flash
- PCIe 4X slot
- AP6256 for WiFi + BT
- 1920*1080 screen
- USB 3.0, 2.0
- USB Type C power and data
- DC 12V/2A
It's 5V/3A, see schematics
Signed-off-by: Peter Robinson pbrobinson@gmail.com
Initial v1 for feedback
U-Boot TPL 2020.01-rc2-00005-g7d87be0ff5 (Nov 14 2019 - 00:27:33) Trying to boot from BOOTROM Returning to boot ROM...
U-Boot SPL 2020.01-rc2-00005-g7d87be0ff5 (Nov 14 2019 - 00:27:33 +0000) Trying to boot from MMC1
U-Boot 2020.01-rc2-00005-g7d87be0ff5 (Nov 14 2019 - 00:27:33 +0000)
Model: Pine64 Pinebook Pro DRAM: 3.9 GiB PMIC: RK808 MMC: dwmmc@fe320000: 1, sdhci@fe330000: 0 In: serial@ff1a0000 Out: serial@ff1a0000 Err: serial@ff1a0000 Model: Pine64 Pinebook Pro ## Error: Can't overwrite "serial#" ## Error inserting "serial#" variable, errno=1
That doesn't look right to me
rockchip_dnl_key_pressed: adc_channel_single_shot fail! Net: No ethernet found. Hit any key to stop autoboot: 0 =>
arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 25 + arch/arm/dts/rk3399-pinebook-pro.dts | 631 ++++++++++++++++++ arch/arm/mach-rockchip/rk3399/Kconfig | 8 + board/pine64/pinebook_pro_rk3399/Kconfig | 15 + board/pine64/pinebook_pro_rk3399/MAINTAINERS | 8 + board/pine64/pinebook_pro_rk3399/Makefile | 1 + .../pinebook_pro_rk3399/pinebook-pro-rk3399.c | 192 ++++++ configs/pinebook_pro-rk3399_defconfig | 76 +++ include/configs/pinebook_pro_rk3399.h | 29 + 10 files changed, 986 insertions(+) create mode 100644 arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-pinebook-pro.dts create mode 100644 board/pine64/pinebook_pro_rk3399/Kconfig create mode 100644 board/pine64/pinebook_pro_rk3399/MAINTAINERS create mode 100644 board/pine64/pinebook_pro_rk3399/Makefile create mode 100644 board/pine64/pinebook_pro_rk3399/pinebook-pro-rk3399.c create mode 100644 configs/pinebook_pro-rk3399_defconfig create mode 100644 include/configs/pinebook_pro_rk3399.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5a64fcc5a7..affedfd666 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -116,6 +116,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ rk3399-nanopi-m4.dtb \ rk3399-nanopi-neo4.dtb \ rk3399-orangepi.dtb \
rk3399-pinebook-pro.dtb \ rk3399-puma-ddr1333.dtb \ rk3399-puma-ddr1600.dtb \ rk3399-puma-ddr1866.dtb \diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi new file mode 100644 index 0000000000..9b0cb7010f --- /dev/null +++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (C) 2019 Peter Robinson <pbrobinson at gmail.com>
- */
+#include "rk3399-u-boot.dtsi" +#include "rk3399-sdram-lpddr4-100.dtsi"
+/ {
chosen {u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;};+};
+&pmugrf {
u-boot,dm-pre-reloc;+};
+&spiflash {
u-boot,dm-pre-reloc;+};
+&uart2 {
u-boot,dm-pre-reloc;+}; diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts new file mode 100644 index 0000000000..85ce0206d7 --- /dev/null +++ b/arch/arm/dts/rk3399-pinebook-pro.dts
You have to submit this DTS into linux first and then sync linux dts to u-boot.
@@ -0,0 +1,631 @@ +/*
- Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
- SPDX-License-Identifier: GPL-2.0+
- */
+/dts-v1/; +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pwm/pwm.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi"
+/ {
model = "Pine64 Pinebook Pro";compatible = "pine64,pinebook-pro", "rockchip,rk3399";chosen {stdout-path = &uart2;};aliases {spi0 = &spi1;};backlight: backlight {compatible = "pwm-backlight";enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;pwms = <&pwm0 0 740740 0>;};gpio-keys {compatible = "gpio-keys";autorepeat;pinctrl-names = "default";pinctrl-0 = <&pwrbtn>;power {debounce-interval = <100>;gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;label = "GPIO Key Power";linux,code = <KEY_POWER>;wakeup-source;};};leds {status = "okay";compatible = "gpio-leds";work-led {label = "work";gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;};standby-led {label = "standby";gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;};};sdio_pwrseq: sdio-pwrseq {compatible = "mmc-pwrseq-simple";clocks = <&rk808 1>;clock-names = "ext_clock";pinctrl-names = "default";pinctrl-0 = <&wifi_enable_h>;/** On the module itself this is one of these (depending* on the actual card populated):* - SDIO_RESET_L_WL_REG_ON* - PDN (power down when low)*/reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;};/* switched by pmic_sleep */vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {compatible = "regulator-fixed";regulator-name = "vcc1v8_s3";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;vin-supply = <&vcc_1v8>;};dc_12v: dc-12v {compatible = "regulator-fixed";regulator-name = "dc_12v";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <12000000>;regulator-max-microvolt = <12000000>;};vcc3v3_sys: vcc3v3-sys {compatible = "regulator-fixed";regulator-name = "vcc3v3_sys";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;vin-supply = <&vcc_sys>;};vcc5v0_host: vcc5v0-host-regulator {compatible = "regulator-fixed";gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;pinctrl-names = "default";pinctrl-0 = <&host_vbus_drv>;regulator-name = "vcc5v0_host";};vcc5v0_usb3_host: vcc5v0-usb3-host-regulator {compatible = "regulator-fixed";enable-active-high;gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;pinctrl-names = "default";pinctrl-0 = <&host_usb3_drv>;regulator-name = "vcc5v0_usb3_host";regulator-always-on;};vcc_sys: vcc-sys {compatible = "regulator-fixed";regulator-name = "vcc_sys";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;vin-supply = <&dc_12v>;};vdd_log: vdd-log {compatible = "pwm-regulator";pwms = <&pwm2 0 25000 1>;pwm-supply = <&vcc_sys>;regulator-name = "vdd_log";regulator-always-on;regulator-boot-on;regulator-init-microvolt = <950000>;regulator-min-microvolt = <800000>;regulator-max-microvolt = <1400000>;};+};
+&cpu_l0 {
cpu-supply = <&vdd_cpu_l>;+};
+&cpu_l1 {
cpu-supply = <&vdd_cpu_l>;+};
+&cpu_l2 {
cpu-supply = <&vdd_cpu_l>;+};
+&cpu_l3 {
cpu-supply = <&vdd_cpu_l>;+};
+&emmc_phy {
status = "okay";+};
+&i2c0 {
clock-frequency = <400000>;i2c-scl-rising-time-ns = <168>;i2c-scl-falling-time-ns = <4>;status = "okay";rk808: pmic@1b {compatible = "rockchip,rk808";reg = <0x1b>;interrupt-parent = <&gpio1>;interrupts = <21 IRQ_TYPE_LEVEL_LOW>;#clock-cells = <1>;clock-output-names = "xin32k", "rk808-clkout2";pinctrl-names = "default";pinctrl-0 = <&pmic_int_l>;rockchip,system-power-controller;wakeup-source;vcc1-supply = <&vcc_sys>;vcc2-supply = <&vcc_sys>;vcc3-supply = <&vcc_sys>;vcc4-supply = <&vcc_sys>;vcc6-supply = <&vcc_sys>;vcc7-supply = <&vcc_sys>;vcc8-supply = <&vcc3v3_sys>;vcc9-supply = <&vcc_sys>;vcc10-supply = <&vcc_sys>;vcc11-supply = <&vcc_sys>;vcc12-supply = <&vcc3v3_sys>;vddio-supply = <&vcc_1v8>;regulators {vdd_center: DCDC_REG1 {regulator-name = "vdd_center";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <750000>;regulator-max-microvolt = <1350000>;regulator-ramp-delay = <6001>;regulator-state-mem {regulator-off-in-suspend;};};vdd_cpu_l: DCDC_REG2 {regulator-name = "vdd_cpu_l";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <750000>;regulator-max-microvolt = <1350000>;regulator-ramp-delay = <6001>;regulator-state-mem {regulator-off-in-suspend;};};vcc_ddr: DCDC_REG3 {regulator-name = "vcc_ddr";regulator-always-on;regulator-boot-on;regulator-state-mem {regulator-on-in-suspend;};};vcc_1v8: DCDC_REG4 {regulator-name = "vcc_1v8";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;regulator-state-mem {regulator-on-in-suspend;regulator-suspend-microvolt = <1800000>;};};vcc1v8_dvp: LDO_REG1 {regulator-name = "vcc1v8_dvp";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;regulator-state-mem {regulator-off-in-suspend;};};vcc3v0_touch: LDO_REG2 {regulator-name = "vcc3v0_touch";regulator-min-microvolt = <3000000>;regulator-max-microvolt = <3000000>;regulator-always-on;regulator-boot-on;regulator-state-mem {regulator-on-in-suspend;regulator-suspend-microvolt = <3000000>;};};vcc1v8_pmu: LDO_REG3 {regulator-name = "vcc1v8_pmu";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;regulator-state-mem {regulator-on-in-suspend;regulator-suspend-microvolt = <1800000>;};};vcc_sdio: LDO_REG4 {regulator-name = "vcc_sdio";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;regulator-state-mem {regulator-on-in-suspend;regulator-suspend-microvolt = <3300000>;};};vcca3v0_codec: LDO_REG5 {regulator-name = "vcca3v0_codec";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <3000000>;regulator-max-microvolt = <3000000>;regulator-state-mem {regulator-off-in-suspend;};};vcc_1v5: LDO_REG6 {regulator-name = "vcc_1v5";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <1500000>;regulator-max-microvolt = <1500000>;regulator-state-mem {regulator-on-in-suspend;regulator-suspend-microvolt = <1500000>;};};vcca1v8_codec: LDO_REG7 {regulator-name = "vcca1v8_codec";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;regulator-state-mem {regulator-off-in-suspend;};};vcc_3v0: LDO_REG8 {regulator-name = "vcc_3v0";regulator-always-on;regulator-boot-on;regulator-min-microvolt = <3000000>;regulator-max-microvolt = <3000000>;regulator-state-mem {regulator-on-in-suspend;regulator-suspend-microvolt = <3000000>;};};vcc3v3_s3: SWITCH_REG1 {regulator-name = "vcc3v3_s3";regulator-always-on;regulator-boot-on;regulator-state-mem {regulator-off-in-suspend;};};vcc3v3_s0: SWITCH_REG2 {regulator-name = "vcc3v3_s0";regulator-always-on;regulator-boot-on;regulator-state-mem {regulator-off-in-suspend;};};};};vdd_cpu_b: regulator@40 {compatible = "silergy,syr827";reg = <0x40>;fcs,suspend-voltage-selector = <1>;pinctrl-names = "default";pinctrl-0 = <&vsel1_gpio>;vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;regulator-compatible = "fan53555-reg";regulator-name = "vdd_cpu_b";regulator-min-microvolt = <712500>;regulator-max-microvolt = <1500000>;regulator-ramp-delay = <1000>;regulator-always-on;regulator-boot-on;vin-supply = <&vcc_sys>;regulator-state-mem {regulator-off-in-suspend;};};vdd_gpu: regulator@41 {compatible = "silergy,syr828";reg = <0x41>;fcs,suspend-voltage-selector = <1>;pinctrl-names = "default";pinctrl-0 = <&vsel2_gpio>;vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;regulator-compatible = "fan53555-reg";regulator-name = "vdd_gpu";regulator-min-microvolt = <712500>;regulator-max-microvolt = <1500000>;regulator-ramp-delay = <1000>;regulator-always-on;regulator-boot-on;vin-supply = <&vcc_sys>;regulator-state-mem {regulator-off-in-suspend;};};+};
+&i2c4 {
i2c-scl-rising-time-ns = <600>;i2c-scl-falling-time-ns = <20>;status = "okay";fusb0: typec-portc@22 {compatible = "fcs,fusb302";reg = <0x22>;interrupt-parent = <&gpio1>;interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;pinctrl-names = "default";pinctrl-0 = <&fusb0_int>;vbus-supply = <&vcc5v0_usb3_host>;status = "okay";};+};
+&io_domains {
status = "okay";bt656-supply = <&vcc1v8_dvp>;audio-supply = <&vcca1v8_codec>;
That's likely has to be vcc_3v0 like on RockPro64.
sdmmc-supply = <&vcc_sdio>;gpio1830-supply = <&vcc_3v0>;+};
+&pmu_io_domains {
pmu1830-supply = <&vcc_3v0>;status = "okay";+};
+&pinctrl {
buttons {pwrbtn: pwrbtn {rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;};};fusb302x {fusb0_int: fusb0-int {rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;};};pmic {pmic_int_l: pmic-int-l {rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;};vsel1_gpio: vsel1-gpio {rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;};vsel2_gpio: vsel2-gpio {rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;};};sdio-pwrseq {wifi_enable_h: wifi-enable-h {rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;};};usb-typec {vcc5v0_typec_en: vcc5v0_typec_en {rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;};};usb2 {vcc5v0_host_en: vcc5v0-host-en {rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;};host_vbus_drv: host-vbus-drv {rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;};host_usb3_drv: host-usb3-drv {rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;};};+};
+&pwm0 {
status = "okay";+};
+&pwm1 {
status = "okay";+};
+&pwm2 {
status = "okay";+};
+&saradc {
status = "okay";+};
+&sdmmc {
bus-width = <4>;status = "okay";max-frequency = <20000000>;
Move max-frequency to u-boot.dtsi
+};
+&sdhci {
bus-width = <8>;max-frequency = <25000000>;
max-frequency should be moved into u-boot.dtsi. I know that u-boot driver doesn't work well with anything higher (likely missing auto tuning?) but linux works just fine with HS200
mmc-hs400-1_8v;mmc-hs400-enhanced-strobe;
HS400 likely won't work since strobe is wired incorrectly. Limit it to HS200.
non-removable;status = "okay";+};
+&tcphy0 {
status = "okay";+};
+&tcphy1 {
status = "okay";+};
+&tsadc {
/* tshut mode 0:CRU 1:GPIO */rockchip,hw-tshut-mode = <1>;/* tshut polarity 0:LOW 1:HIGH */rockchip,hw-tshut-polarity = <1>;status = "okay";+};
+&u2phy0 {
status = "okay";u2phy0_otg: otg-port {status = "okay";};u2phy0_host: host-port {phy-supply = <&vcc5v0_host>;status = "okay";};+};
+&u2phy1 {
status = "okay";u2phy1_otg: otg-port {status = "okay";};u2phy1_host: host-port {phy-supply = <&vcc5v0_host>;status = "okay";};+};
+&uart2 {
status = "okay";+};
+&usb_host0_ehci {
status = "okay";+};
+&usb_host0_ohci {
status = "okay";+};
+&usb_host1_ehci {
status = "okay";+};
+&usb_host1_ohci {
status = "okay";+};
+&usbdrd3_0 {
status = "okay";+};
+&usbdrd_dwc3_0 {
status = "okay";dr_mode = "otg";+};
+&usbdrd3_1 {
status = "okay";+};
+&usbdrd_dwc3_1 {
status = "okay";dr_mode = "host";+};
+&spi1 {
status = "okay";spiflash: spi-flash@0 {#address-cells = <0x1>;#size-cells = <1>;compatible = "jedec,spi-nor";reg = <0x0>;spi-max-frequency = <10000000>;status = "okay";partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;loader@8000 {label = "loader";reg = <0x0 0x3F8000>;};env@3f8000 {label = "env";reg = <0x3F8000 0x8000>;};vendor@7c0000 {label = "vendor";reg = <0x7C0000 0x40000>;};};};+}; diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index f781eacd16..f694ce0119 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -10,6 +10,13 @@ config TARGET_EVB_RK3399 with full function and phisical connectors support like type-C ports, usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial...
+config TARGET_PINEBOOK_PRO_RK3399
bool "Pinebook Pro"helpPinebook Pro is a laptop based on the Rockchip rk3399 SoCwith 4Gb RAM, onboard eMMC, USB-C, a USB3 and USB2 port,1920*1080 screen and all the usual laptop features.config TARGET_PUMA_RK3399 bool "Theobroma Systems RK3399-Q7 (Puma)" help @@ -94,6 +101,7 @@ config TPL_TEXT_BASE config SPL_STACK_R_ADDR default 0x04000000
+source "board/pine64/pinebook_pro_rk3399/Kconfig" source "board/rockchip/evb_rk3399/Kconfig" source "board/theobroma-systems/puma_rk3399/Kconfig" source "board/vamrs/rock960_rk3399/Kconfig" diff --git a/board/pine64/pinebook_pro_rk3399/Kconfig b/board/pine64/pinebook_pro_rk3399/Kconfig new file mode 100644 index 0000000000..c37c643d6f --- /dev/null +++ b/board/pine64/pinebook_pro_rk3399/Kconfig @@ -0,0 +1,15 @@ +if TARGET_PINEBOOK_PRO_RK3399
+config SYS_BOARD
default "pinebook_pro_rk3399"+config SYS_VENDOR
default "pine64"+config SYS_CONFIG_NAME
default "pinebook_pro_rk3399"+config BOARD_SPECIFIC_OPTIONS
def_bool y+endif diff --git a/board/pine64/pinebook_pro_rk3399/MAINTAINERS b/board/pine64/pinebook_pro_rk3399/MAINTAINERS new file mode 100644 index 0000000000..58400ebd28 --- /dev/null +++ b/board/pine64/pinebook_pro_rk3399/MAINTAINERS @@ -0,0 +1,8 @@ +PINEBOOK_PRO +M: Peter Robinson <pbrobinson at gmail.com> +S: Maintained +F: board/pine64/pinebook_pro_rk3399/ +F: include/configs/pinebook_pro_rk3399.h +F: arch/arm/dts/rk3399-pinebook-pro.dts +F: arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +F: configs/pinebook_pro-rk3399_defconfig diff --git a/board/pine64/pinebook_pro_rk3399/Makefile b/board/pine64/pinebook_pro_rk3399/Makefile new file mode 100644 index 0000000000..2f692a12a6 --- /dev/null +++ b/board/pine64/pinebook_pro_rk3399/Makefile @@ -0,0 +1 @@ +obj-y += pinebook-pro-rk3399.o diff --git a/board/pine64/pinebook_pro_rk3399/pinebook-pro-rk3399.c b/board/pine64/pinebook_pro_rk3399/pinebook-pro-rk3399.c new file mode 100644 index 0000000000..b1a2ed3b77 --- /dev/null +++ b/board/pine64/pinebook_pro_rk3399/pinebook-pro-rk3399.c @@ -0,0 +1,192 @@ +/*
- (C) Copyright 2016 Rockchip Electronics Co., Ltd
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <dm.h> +#include <misc.h> +#include <syscon.h> +#include <dm/pinctrl.h> +#include <dm/uclass-internal.h> +#include <asm/io.h> +#include <asm/setup.h> +#include <asm/arch-rockchip/clock.h> +#include <asm/arch-rockchip/grf_rk3399.h> +#include <asm/arch-rockchip/hardware.h> +#include <asm/arch-rockchip/misc.h> +#include <asm/arch-rockchip/periph.h> +#include <power/regulator.h> +#include <usb.h> +#include <dwc3-uboot.h>
+#define RK3399_CPUID_OFF 0x7 +#define RK3399_CPUID_LEN 0x10
+static int fix_lcd_backling_pull_mode(void) +{ +#include <asm/arch-rockchip/grf_rk3399.h>
+#define PMU_GRF_BASE 0xff320000
// set pull of GPIO1_A0
Wrong comment style.
struct rk3399_pmugrf_regs * const pmugrf = (void *)PMU_GRF_BASE;rk_clrsetreg(&pmugrf->gpio1_p[0], 3 << (2 * 0), 0 << (2 * 0));return 0;+}
+#ifndef CONFIG_SPL_BUILD +int board_early_init_f(void) +{
struct udevice *regulator;int ret;ret = regulator_get_by_platname("vcc5v0_host", ®ulator);if (ret) {debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);goto out;}
I'd expect USB host driver to do that for you.
ret = regulator_set_enable(regulator, true);if (ret)debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);fix_lcd_backling_pull_mode();+out:
return 0;+} +#endif
+static void setup_serial(void) +{
You already do that in misc_init_r().
Regards, Vasily
+#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
struct udevice *dev;int ret, i;u8 cpuid[RK3399_CPUID_LEN];u8 low[RK3399_CPUID_LEN/2], high[RK3399_CPUID_LEN/2];char cpuid_str[RK3399_CPUID_LEN * 2 + 1];u64 serialno;char serialno_str[16];/* retrieve the device */ret = uclass_get_device_by_driver(UCLASS_MISC,DM_GET_DRIVER(rockchip_efuse), &dev);if (ret) {debug("%s: could not find efuse device\n", __func__);return;}/* read the cpu_id range from the efuses */ret = misc_read(dev, RK3399_CPUID_OFF, &cpuid, sizeof(cpuid));if (ret) {debug("%s: reading cpuid from the efuses failed\n",__func__);return;}memset(cpuid_str, 0, sizeof(cpuid_str));for (i = 0; i < 16; i++)sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);debug("cpuid: %s\n", cpuid_str);/** Mix the cpuid bytes using the same rules as in* ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c*/for (i = 0; i < 8; i++) {low[i] = cpuid[1 + (i << 1)];high[i] = cpuid[i << 1];}serialno = crc32_no_comp(0, low, 8);serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);env_set("cpuid#", cpuid_str);env_set("serial#", serialno_str);+#endif
return;+}
+#define GRF_IO_VSEL_BT565_SHIFT 0 +#define PMUGRF_CON0_VSEL_SHIFT 8
+#ifdef CONFIG_MISC_INIT_R +static void setup_iodomain(void) +{
struct rk3399_grf_regs *grf =syscon_get_first_range(ROCKCHIP_SYSCON_GRF);struct rk3399_pmugrf_regs *pmugrf =syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);/* BT565 is in 1.8v domain */rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);/* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);+}
+int misc_init_r(void) +{
const u32 cpuid_offset = 0x7;const u32 cpuid_length = 0x10;u8 cpuid[cpuid_length];int ret;setup_iodomain();ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);if (ret)return ret;ret = rockchip_cpuid_set(cpuid, cpuid_length);if (ret)return ret;ret = rockchip_setup_macaddr();setup_serial();return ret;+} +#endif
+#ifdef CONFIG_SERIAL_TAG +void get_board_serial(struct tag_serialnr *serialnr) +{
char *serial_string;u64 serial = 0;serial_string = env_get("serial#");if (serial_string)serial = simple_strtoull(serial_string, NULL, 16);serialnr->high = (u32)(serial >> 32);serialnr->low = (u32)(serial & 0xffffffff);+} +#endif
+#ifdef CONFIG_USB_DWC3 +static struct dwc3_device dwc3_device_data = {
.maximum_speed = USB_SPEED_HIGH,.base = 0xfe800000,.dr_mode = USB_DR_MODE_PERIPHERAL,.index = 0,.dis_u2_susphy_quirk = 1,+};
+int usb_gadget_handle_interrupts(void) +{
dwc3_uboot_handle_interrupt(0);return 0;+}
+int board_usb_init(int index, enum usb_init_type init) +{
return dwc3_uboot_init(&dwc3_device_data);+} +#endif diff --git a/configs/pinebook_pro-rk3399_defconfig b/configs/pinebook_pro-rk3399_defconfig new file mode 100644 index 0000000000..28577256e7 --- /dev/null +++ b/configs/pinebook_pro-rk3399_defconfig @@ -0,0 +1,76 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_PINEBOOK_PRO_RK3399=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb" +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_MTDPARTS=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_BOOTDELAY=3 +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DM_ETH=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_ROCKCHIP_SPI=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_ROCKCHIP_USB2_PHY=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +# CONFIG_USB_XHCI_ROCKCHIP is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y diff --git a/include/configs/pinebook_pro_rk3399.h b/include/configs/pinebook_pro_rk3399.h new file mode 100644 index 0000000000..f383becbf8 --- /dev/null +++ b/include/configs/pinebook_pro_rk3399.h @@ -0,0 +1,29 @@ +/*
- Copyright (C) 2016 Rockchip Electronics Co., Ltd
- Copyright (C) 2019 Peter Robinson <pbrobinson at gmail.com>
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __PINEBOOKPRO_RK3399_H +#define __PINEBOOKPRO_RK3399_H
+#define ROCKCHIP_DEVICE_SETTINGS \
"stdin=serial,usbkbd\0" \"stdout=serial,vidconsole\0" \"stderr=serial,vidconsole\0"+#include <configs/rk3399_common.h>
+#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#endif
+#undef CONFIG_SYS_SPI_U_BOOT_OFFS +#define CONFIG_SYS_SPI_U_BOOT_OFFS 1024 * 512
+#define SDRAM_BANK_SIZE (2UL << 30)
+#endif
2.23.0
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