
On Sat, Oct 22, 2022 at 4:44 PM Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
This might collide with [1]. Since the series I pushed unifies the 8mn devices with common -u-boot.dtsi file. It shows it's awaiting upstream.
adam
[1] - https://patchwork.ozlabs.org/project/uboot/list/?series=324057&state=%2A...
(no changes since v1)
arch/arm/dts/imx8mn-beacon-baseboard.dtsi | 4 +- arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi | 2 +- .../dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi | 2 +- arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 2 +- arch/arm/dts/imx8mn-evk.dtsi | 45 ++++++++++++++++++- .../dts/imx8mn-var-som-symphony-u-boot.dtsi | 2 +- arch/arm/dts/imx8mn-var-som-symphony.dts | 6 +-- arch/arm/dts/imx8mn-venice-gw7902.dts | 8 ++-- arch/arm/dts/imx8mn-venice-u-boot.dtsi | 2 +- arch/arm/dts/imx8mn.dtsi | 13 +++--- include/dt-bindings/interconnect/imx8mn.h | 41 +++++++++++++++++ 11 files changed, 106 insertions(+), 21 deletions(-) create mode 100644 include/dt-bindings/interconnect/imx8mn.h
diff --git a/arch/arm/dts/imx8mn-beacon-baseboard.dtsi b/arch/arm/dts/imx8mn-beacon-baseboard.dtsi index 02f37dcda7..9e82069c94 100644 --- a/arch/arm/dts/imx8mn-beacon-baseboard.dtsi +++ b/arch/arm/dts/imx8mn-beacon-baseboard.dtsi @@ -146,7 +146,7 @@ };
&easrc {
fsl,asrc-rate = <48000>;
fsl,asrc-rate = <48000>; status = "okay";
};
@@ -182,7 +182,7 @@ &usbotg1 { vbus-supply = <®_usb_otg_vbus>; disable-over-current;
dr_mode="otg";
dr_mode = "otg"; status = "okay";
};
diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi index 0efa6862eb..5e6018c25b 100644 --- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi @@ -15,7 +15,7 @@ }; };
-&{/soc@0} { +&soc { u-boot,dm-pre-reloc; u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi index c4ae7ca4f3..8312b64bcc 100644 --- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi +++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi @@ -16,7 +16,7 @@ }; };
-&{/soc@0} { +&soc { u-boot,dm-pre-reloc; u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 3a9ba8b8c9..88b4e8dc50 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -21,7 +21,7 @@ }; };
-&{/soc@0} { +&soc { u-boot,dm-pre-reloc; u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-evk.dtsi b/arch/arm/dts/imx8mn-evk.dtsi index d1f6cccfa0..261c365400 100644 --- a/arch/arm/dts/imx8mn-evk.dtsi +++ b/arch/arm/dts/imx8mn-evk.dtsi @@ -47,6 +47,11 @@ linux,autosuspend-period = <125>; };
audio_codec_bt_sco: audio-codec-bt-sco {
compatible = "linux,bt-sco";
#sound-dai-cells = <1>;
};
wm8524: audio-codec { #sound-dai-cells = <0>; compatible = "wlf,wm8524";
@@ -57,6 +62,25 @@ clock-names = "mclk"; };
sound-bt-sco {
compatible = "simple-audio-card";
simple-audio-card,name = "bt-sco-audio";
simple-audio-card,format = "dsp_a";
simple-audio-card,bitclock-inversion;
simple-audio-card,frame-master = <&btcpu>;
simple-audio-card,bitclock-master = <&btcpu>;
btcpu: simple-audio-card,cpu {
sound-dai = <&sai2>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <16>;
};
simple-audio-card,codec {
sound-dai = <&audio_codec_bt_sco 1>;
};
};
sound-wm8524 { compatible = "fsl,imx-audio-wm8524"; model = "wm8524-audio";
@@ -78,7 +102,7 @@ };
&easrc {
fsl,asrc-rate = <48000>;
fsl,asrc-rate = <48000>; status = "okay";
};
@@ -183,6 +207,16 @@ }; };
+&sai2 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
assigned-clocks = <&clk IMX8MN_CLK_SAI2>;
assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>;
status = "okay";
+};
&sai3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai3>; @@ -354,6 +388,15 @@ >; };
pinctrl_sai2: sai2grp {
fsl,pins = <
MX8MN_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
MX8MN_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
MX8MN_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
MX8MN_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
>;
};
pinctrl_sai3: sai3grp { fsl,pins = < MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi index ed1ab10ded..28fcb10e59 100644 --- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi @@ -15,7 +15,7 @@ }; };
-&{/soc@0} { +&soc { u-boot,dm-pre-reloc; u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-var-som-symphony.dts b/arch/arm/dts/imx8mn-var-som-symphony.dts index f61c48776c..3ed7021a48 100644 --- a/arch/arm/dts/imx8mn-var-som-symphony.dts +++ b/arch/arm/dts/imx8mn-var-som-symphony.dts @@ -26,19 +26,19 @@ gpio-keys { compatible = "gpio-keys";
back {
key-back { label = "Back"; gpios = <&pca9534 1 GPIO_ACTIVE_LOW>; linux,code = <KEY_BACK>; };
home {
key-home { label = "Home"; gpios = <&pca9534 2 GPIO_ACTIVE_LOW>; linux,code = <KEY_HOME>; };
menu {
key-menu { label = "Menu"; gpios = <&pca9534 3 GPIO_ACTIVE_LOW>; linux,code = <KEY_MENU>;
diff --git a/arch/arm/dts/imx8mn-venice-gw7902.dts b/arch/arm/dts/imx8mn-venice-gw7902.dts index 367a232675..636f8602b9 100644 --- a/arch/arm/dts/imx8mn-venice-gw7902.dts +++ b/arch/arm/dts/imx8mn-venice-gw7902.dts @@ -39,13 +39,13 @@ gpio-keys { compatible = "gpio-keys";
user-pb {
key-user-pb { label = "user_pb"; gpios = <&gpio 2 GPIO_ACTIVE_LOW>; linux,code = <BTN_0>; };
user-pb1x {
key-user-pb1x { label = "user_pb1x"; linux,code = <BTN_1>; interrupt-parent = <&gsc>;
@@ -59,14 +59,14 @@ interrupts = <1>; };
eeprom-wp {
key-eeprom-wp { label = "eeprom_wp"; linux,code = <BTN_3>; interrupt-parent = <&gsc>; interrupts = <2>; };
tamper {
key-tamper { label = "tamper"; linux,code = <BTN_4>; interrupt-parent = <&gsc>;
diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi index 9debf9675d..1974743d7f 100644 --- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi @@ -15,7 +15,7 @@ }; };
-&{/soc@0} { +&soc { u-boot,dm-pre-reloc; u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn.dtsi b/arch/arm/dts/imx8mn.dtsi index e41e1d56f9..0c71b740a3 100644 --- a/arch/arm/dts/imx8mn.dtsi +++ b/arch/arm/dts/imx8mn.dtsi @@ -212,7 +212,7 @@ clk_ext4: clock-ext4 { compatible = "fixed-clock"; #clock-cells = <0>;
clock-frequency= <133000000>;
clock-frequency = <133000000>; clock-output-names = "clk_ext4"; };
@@ -269,7 +269,7 @@ arm,no-tick-in-suspend; };
soc@0 {
soc: soc@0 { compatible = "fsl,imx8mn-soc", "simple-bus"; #address-cells = <1>; #size-cells = <1>;
@@ -422,7 +422,7 @@ "ctx2_rx", "ctx2_tx", "ctx3_rx", "ctx3_tx"; firmware-name = "imx/easrc/easrc-imx8mn.bin";
fsl,asrc-rate = <8000>;
fsl,asrc-rate = <8000>; fsl,asrc-format = <2>; status = "disabled"; };
@@ -857,6 +857,7 @@ compatible = "fsl,sec-v4.0-job-ring"; reg = <0x1000 0x1000>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; }; sec_jr1: jr@2000 {
@@ -941,7 +942,7 @@ <&clk IMX8MN_CLK_USDHC1_ROOT>; clock-names = "ipg", "ahb", "per"; fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
fsl,tuning-step = <2>; bus-width = <4>; status = "disabled"; };
@@ -955,7 +956,7 @@ <&clk IMX8MN_CLK_USDHC2_ROOT>; clock-names = "ipg", "ahb", "per"; fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
fsl,tuning-step = <2>; bus-width = <4>; status = "disabled"; };
@@ -969,7 +970,7 @@ <&clk IMX8MN_CLK_USDHC3_ROOT>; clock-names = "ipg", "ahb", "per"; fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
fsl,tuning-step = <2>; bus-width = <4>; status = "disabled"; };
diff --git a/include/dt-bindings/interconnect/imx8mn.h b/include/dt-bindings/interconnect/imx8mn.h new file mode 100644 index 0000000000..307b977100 --- /dev/null +++ b/include/dt-bindings/interconnect/imx8mn.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/*
- Interconnect framework driver for i.MX SoC
- Copyright (c) 2019-2020, NXP
- */
+#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MN_H +#define __DT_BINDINGS_INTERCONNECT_IMX8MN_H
+#define IMX8MN_ICN_NOC 1 +#define IMX8MN_ICS_DRAM 2 +#define IMX8MN_ICS_OCRAM 3 +#define IMX8MN_ICM_A53 4
+#define IMX8MN_ICM_GPU 5 +#define IMX8MN_ICN_GPU 6
+#define IMX8MN_ICM_CSI1 7 +#define IMX8MN_ICM_CSI2 8 +#define IMX8MN_ICM_ISI 9 +#define IMX8MN_ICM_LCDIF 10 +#define IMX8MN_ICN_MIPI 11
+#define IMX8MN_ICM_USB 12
+#define IMX8MN_ICM_SDMA2 13 +#define IMX8MN_ICM_SDMA3 14 +#define IMX8MN_ICN_AUDIO 15
+#define IMX8MN_ICN_ENET 16 +#define IMX8MN_ICM_ENET 17
+#define IMX8MN_ICM_NAND 18 +#define IMX8MN_ICM_SDMA1 19 +#define IMX8MN_ICM_USDHC1 20 +#define IMX8MN_ICM_USDHC2 21 +#define IMX8MN_ICM_USDHC3 22 +#define IMX8MN_ICN_MAIN 23
+#endif /* __DT_BINDINGS_INTERCONNECT_IMX8MN_H */
2.35.1