HI Wolfgang,
This is because writing assembly code (lowlevel_init) is really a necessity for setting the timing and power outpur correctly to these registers (SMC, SDMC, PMU).
What exactly prevents you from writing the very same code in C?
It is required to give a correct setting to PMU and SMC to make the onboard DRAM works correctly before the code is loaded from ROM to DRAM and then set up stack for C environemnt.
I've traced the start up code of MIPS and POWERPC architecture. They still have direct access to dram for setting up the small stack (<4KB) for C environment.
Ex. In the code in mips/start.S li t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET la sp, 0(t0)
la t9, board_init_f jr t9 nop
If you do not have direct ram access, you still need have something like internal "sram" to set up this small stack like "arch/powerpc/cpu/mpc5xx/start.S" /* Initialize some SPRs that are hard to access from C */ /*----------------------------------------------------------------------*/
lis r3, CONFIG_SYS_IMMR@h /* Pass IMMR as arg1 to C routine */ lis r2, CONFIG_SYS_INIT_SP_ADDR@h ori r1, r2, CONFIG_SYS_INIT_SP_ADDR@l /* Set up the stack in internal SRAM */ /* Note: R0 is still 0 here */ stwu r0, -4(r1) /* Clear final stack frame so that */ stwu r0, -4(r1) /* stack backtraces terminate cleanly */
However, after I have double confirmed with the hardware and architecture colleagues. We do not have both internal SRAM nor have direct access to RAM to setup this initial stack.
More then that, the initial timing and parameters setting in the SMC registers for driving the on board DRAM was not correct for store the initial stack to DRAM.
So it is necessary to set the correct timing to the registers in the SMC for even just to setup the initial stack to on board DRAM in lowlevel_init.S.
We take care to provide global data and an initial stack very, very early in the initialization sequence. You canuse C code long before you can access the system RAM.
Hence assembly code to setting SMC and PMU in lowlevel_init is a necessity
There is not only the work to set SMC in lowlevel_init is enough, correctly to set a parameters to PMU is also necessary. This is because PMU will management the PLL/DLL to generate correct timing to DRAM, AHB, and other peripheral devices. The hardware initial value of this PLL/DLL was not correct for help the DRAM access also. Even I set the correct timing to SMC (DRAM) was not enough, it is required to set PMU also. Hence we need to set the correct value for PMU in lowlevel_init.S. So there are needs for our board to write asm to set those parameters.
Hope you can understand the above explanations. If you have any questions please let me know.