Hi Peng,
I faced an issue with the I2C bus speed in SPL for the imx8mq. I figured out that the bus frequency is set to about 1MHz. While digging into that I found that the clk ID for the I2C is not returned for the imx8mq correctly.
Can you confirm that this is missing here.
This is what I added and now it looks better.
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c index 60e2218a3c..9e45ffd66b 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c @@ -363,6 +363,12 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return get_root_clk(USDHC1_CLK_ROOT); case MXC_ESDHC2_CLK: return get_root_clk(USDHC2_CLK_ROOT); + case MXC_I2C_CLK: + return get_root_clk(I2C1_CLK_ROOT); + case MXC_UART_CLK: + return get_root_clk(UART1_CLK_ROOT); + case MXC_QSPI_CLK: + return get_root_clk(QSPI_CLK_ROOT); default: return get_root_clk(clk); }