Add the PCIe EP mode support for lx2160a-v2 platform.
Signed-off-by: Xiaowei Bao xiaowei.bao@nxp.com --- drivers/pci/pcie_layerscape.c | 8 +++++++- drivers/pci/pcie_layerscape.h | 9 ++++++++- 2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index e17a23c..9ab3a55 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -484,7 +484,8 @@ static void ls_pcie_setup_ep(struct ls_pcie *pcie) writel(0, pcie->dbi + PCIE_MISC_CONTROL_1_OFF);
bar_base = pcie->dbi + - PCIE_MASK_OFFSET(pcie->cfg2_flag, pf); + PCIE_MASK_OFFSET(pcie->cfg2_flag, pf, + pcie->pf1_offset);
if (pcie->cfg2_flag) { ctrl_writel(pcie, @@ -596,6 +597,11 @@ static int ls_pcie_probe(struct udevice *dev) pcie->ctrl = pcie->lut + 0x40000; }
+ if (svr == SVR_LX2160A) + pcie->pf1_offset = LX2160_PCIE_PF1_OFFSET; + else + pcie->pf1_offset = LS_PCIE_PF1_OFFSET; + if (svr == SVR_LS2080A || svr == SVR_LS2085A) pcie->cfg2_flag = 1; else diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h index 0ba06e9..303c2b9 100644 --- a/drivers/pci/pcie_layerscape.h +++ b/drivers/pci/pcie_layerscape.h @@ -100,7 +100,7 @@ #define PCIE_SRIOV_VFBAR0 0x19C #define PCIE_MISC_CONTROL_1_OFF 0x8BC
-#define PCIE_MASK_OFFSET(flag, pf) ((flag) ? 0 : (0x1000 + 0x20000 * (pf))) +#define PCIE_MASK_OFFSET(flag, pf, off) ((flag) ? 0 : (0x1000 + (off) * (pf)))
/* LUT registers */ #define PCIE_LUT_UDR(n) (0x800 + (n) * 8) @@ -132,6 +132,12 @@ #define LS1021_PEXMSCPORTSR(pex_idx) (0x94 + (pex_idx) * 4) #define LS1021_LTSSM_STATE_SHIFT 20
+/* LX2160a PF1 offset */ +#define LX2160_PCIE_PF1_OFFSET 0x8000 + +/* layerscape PF1 offset */ +#define LS_PCIE_PF1_OFFSET 0x20000 + struct ls_pcie { int idx; struct list_head list; @@ -150,6 +156,7 @@ struct ls_pcie { int next_lut_index; uint sriov_flag; uint cfg2_flag; + uint pf1_offset; int stream_id_cur; int mode; };