This adds a test for the various methods of extracting ram_base and ram_size from a device tree.
Signed-off-by: Sean Anderson seanga2@gmail.com Reviewed-by: Simon Glass sjg@chromium.org ---
(no changes since v1)
arch/sandbox/dts/test.dts | 12 ++++++++++ configs/sandbox64_defconfig | 2 +- configs/sandbox_defconfig | 2 +- configs/sandbox_flattree_defconfig | 2 +- test/dm/fdtdec.c | 38 ++++++++++++++++++++++++++++++ 5 files changed, 53 insertions(+), 3 deletions(-)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index c7d1376911..f13bbdca7d 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -1221,6 +1221,18 @@ compatible = "sandbox,regmap_test"; }; }; + + memory@0000 { + device_type = "memory"; + reg = <0x1000 0x2000>, + <0x0000 0x1000>; + }; + + memory@8000 { + device_type = "memory"; + reg = <0x8000 0x0000>, + <0x4000 0x3000>; + }; };
#include "sandbox_pmic.dtsi" diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index c3ca796d51..6324961cf1 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -1,5 +1,5 @@ CONFIG_SYS_TEXT_BASE=0 -CONFIG_NR_DRAM_BANKS=1 +CONFIG_NR_DRAM_BANKS=4 CONFIG_ENV_SIZE=0x2000 CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_BOOTSTAGE_STASH_ADDR=0x0 diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 18f787cb51..2f2333febc 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -1,5 +1,5 @@ CONFIG_SYS_TEXT_BASE=0 -CONFIG_NR_DRAM_BANKS=1 +CONFIG_NR_DRAM_BANKS=4 CONFIG_ENV_SIZE=0x2000 CONFIG_PRE_CON_BUF_ADDR=0xf0000 CONFIG_BOOTSTAGE_STASH_ADDR=0x0 diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index dd93167e1b..a4941b54d3 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -1,5 +1,5 @@ CONFIG_SYS_TEXT_BASE=0 -CONFIG_NR_DRAM_BANKS=1 +CONFIG_NR_DRAM_BANKS=4 CONFIG_ENV_SIZE=0x2000 CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_DEFAULT_DEVICE_TREE="sandbox" diff --git a/test/dm/fdtdec.c b/test/dm/fdtdec.c index 017157a2ec..00ccb8c615 100644 --- a/test/dm/fdtdec.c +++ b/test/dm/fdtdec.c @@ -131,3 +131,41 @@ static int dm_test_fdtdec_add_reserved_memory(struct unit_test_state *uts) } DM_TEST(dm_test_fdtdec_add_reserved_memory, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE); + +static int _dm_test_fdtdec_setup_mem(struct unit_test_state *uts) +{ + ut_assertok(fdtdec_setup_mem_size_base()); + ut_asserteq(0x1000, gd->ram_base); + ut_asserteq(0x2000, gd->ram_size); + + ut_assertok(fdtdec_setup_mem_size_base_lowest()); + ut_asserteq(0x0000, gd->ram_base); + ut_asserteq(0x1000, gd->ram_size); + + ut_assertok(fdtdec_setup_mem_size_base_highest()); + ut_asserteq(0x4000, gd->ram_base); + ut_asserteq(0x3000, gd->ram_size); + + return 0; +} + +/* + * We need to wrap the actual test so that we don't overwrite the ram parameters + * for the rest of U-Boot + */ +static int dm_test_fdtdec_setup_mem(struct unit_test_state *uts) +{ + int ret; + unsigned long base, size; + + base = gd->ram_base; + size = gd->ram_size; + + ret = _dm_test_fdtdec_setup_mem(uts); + + gd->ram_base = base; + gd->ram_size = size; + + return ret; +} +DM_TEST(dm_test_fdtdec_setup_mem, UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);