Re: [PATCH 12/12] ARM: dts: sun50i: H6: Sync from Linux v5.18-rc1

20 May 2022

On Wed, 27 Apr 2022 15:31:31 -0500
Samuel Holland samuel@sholland.org wrote:
...
Copy the devicetree source for the H6 SoC and all existing boards
from the Linux v5.18-rc1 tag.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.
This commit also adds the following new board devicetrees:

sun50i-h6-pine-h64-model-b.dts
sun50i-h6-tanix-tx6-mini.dts

This update should not impact any existing U-Boot functionality.
Signed-off-by: Samuel Holland samuel@sholland.org
Compared against the Linux kernel, apart from the r_intc changes they are
the same.
The changes look innocent, and shouldn't affect U-Boot or Linux kernel
compatibility.
Reviewed-by: Andre Przywara andre.przywara@arm.com
Cheers,
Andre
...

arch/arm/dts/Makefile                       |   4 +-
 arch/arm/dts/sun50i-h6-beelink-gs1.dts      |  38 ++--
 arch/arm/dts/sun50i-h6-cpu-opp.dtsi         |   2 +-
 arch/arm/dts/sun50i-h6-orangepi-3.dts       |  14 +-
 arch/arm/dts/sun50i-h6-orangepi.dtsi        |  22 +--
 arch/arm/dts/sun50i-h6-pine-h64-model-b.dts |  51 ++++++
 arch/arm/dts/sun50i-h6-tanix-tx6-mini.dts   |  15 ++
 arch/arm/dts/sun50i-h6-tanix-tx6.dts        | 115 ++----------
 arch/arm/dts/sun50i-h6-tanix.dtsi           | 189 ++++++++++++++++++++
 arch/arm/dts/sun50i-h6.dtsi                 |  26 ++-
 10 files changed, 328 insertions(+), 148 deletions(-)
 create mode 100644 arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
 create mode 100644 arch/arm/dts/sun50i-h6-tanix-tx6-mini.dts
 create mode 100644 arch/arm/dts/sun50i-h6-tanix.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 95909ef037..85e731aec9 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -695,7 +695,9 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \
   sun50i-h6-orangepi-lite2.dtb \
   sun50i-h6-orangepi-one-plus.dtb \
   sun50i-h6-pine-h64.dtb \

sun50i-h6-tanix-tx6.dtb


sun50i-h6-pine-h64-model-b.dtb \
sun50i-h6-tanix-tx6.dtb \
sun50i-h6-tanix-tx6-mini.dtb

dtb-$(CONFIG_MACH_SUN50I_H616) += \
   sun50i-h616-orangepi-zero2.dtb
 dtb-$(CONFIG_MACH_SUN50I) += \
diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
index b5808047d6..649b146dff 100644
--- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
@@ -150,12 +150,28 @@
   vcc-pg-supply = <&reg_aldo1>;
 };
-&r_i2c {
+&r_ir {

linux,rc-map-name = "rc-beelink-gs1";
status = "okay";

+};



+&r_pio {

/*
* FIXME: We can't add that supply for now since it would


* create a circular dependency between pinctrl, the regulator


* and the RSB Bus.


*


* vcc-pl-supply = <&reg_aldo1>;


*/


vcc-pm-supply = <&reg_aldo1>;

+};



+&r_rsb {
   status = "okay";

axp805: pmic@36 {


axp805: pmic@745 {
compatible = "x-powers,axp805", "x-powers,axp806";


reg = <0x36>;




reg = <0x745>;

interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;

@@ -273,22 +289,6 @@
   };
 };
-&r_ir {

linux,rc-map-name = "rc-beelink-gs1";
status = "okay";

-};



-&r_pio {

/*
* PL0 and PL1 are used for PMIC I2C


* don't enable the pl-supply else


* it will fail at boot


*


* vcc-pl-supply = <&reg_aldo1>;


*/


vcc-pm-supply = <&reg_aldo1>;

-};



&spdif {
   status = "okay";
 };
diff --git a/arch/arm/dts/sun50i-h6-cpu-opp.dtsi b/arch/arm/dts/sun50i-h6-cpu-opp.dtsi
index 8c6e8536b6..0baf0f8e4d 100644
--- a/arch/arm/dts/sun50i-h6-cpu-opp.dtsi
+++ b/arch/arm/dts/sun50i-h6-cpu-opp.dtsi
@@ -3,7 +3,7 @@
 // Copyright (C) 2020 Clément Péron peron.clem@gmail.com
/ {

cpu_opp_table: cpu-opp-table {


cpu_opp_table: opp-table-cpu {
compatible = "allwinner,sun50i-h6-operating-points";
nvmem-cells = <&cpu_speed_grade>;
opp-shared;

diff --git a/arch/arm/dts/sun50i-h6-orangepi-3.dts b/arch/arm/dts/sun50i-h6-orangepi-3.dts
index 7e83f6146f..9f12c05e21 100644
--- a/arch/arm/dts/sun50i-h6-orangepi-3.dts
+++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts
@@ -175,12 +175,16 @@
   vcc-pg-supply = <&reg_vcc_wifi_io>;
 };
-&r_i2c {
+&r_ir {

status = "okay";

+};



+&r_rsb {
   status = "okay";

axp805: pmic@36 {


axp805: pmic@745 {
compatible = "x-powers,axp805", "x-powers,axp806";


reg = <0x36>;




reg = <0x745>;

interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;

@@ -291,10 +295,6 @@
   };
 };
-&r_ir {

status = "okay";

-};



&rtc {
   clocks = <&ext_osc32k>;
 };
diff --git a/arch/arm/dts/sun50i-h6-orangepi.dtsi b/arch/arm/dts/sun50i-h6-orangepi.dtsi
index da0875bd38..a5811d55bb 100644
--- a/arch/arm/dts/sun50i-h6-orangepi.dtsi
+++ b/arch/arm/dts/sun50i-h6-orangepi.dtsi
@@ -112,12 +112,20 @@
   vcc-pg-supply = <&reg_aldo1>;
 };
-&r_i2c {
+&r_ir {

status = "okay";

+};



+&r_pio {

vcc-pm-supply = <&reg_bldo3>;

+};



+&r_rsb {
   status = "okay";

axp805: pmic@36 {


axp805: pmic@745 {
compatible = "x-powers,axp805", "x-powers,axp806";


reg = <0x36>;




reg = <0x745>;

interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;

@@ -232,14 +240,6 @@
   };
 };
-&r_ir {

status = "okay";

-};



-&r_pio {

vcc-pm-supply = <&reg_bldo3>;

-};



&rtc {
   clocks = <&ext_osc32k>;
 };
diff --git a/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts b/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
new file mode 100644
index 0000000000..686f58e770
--- /dev/null
+++ b/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*


Copyright (C) 2019 Corentin LABBE clabbe@baylibre.com


*/


+#include "sun50i-h6-pine-h64.dts"



+/ {

model = "Pine H64 model B";
compatible = "pine64,pine-h64-model-b", "allwinner,sun50i-h6";

/delete-node/ reg_gmac_3v3;

wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";


reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */


post-power-on-delay-ms = <200>;


};

+};



+&hdmi_connector {

/delete-property/ ddc-en-gpios;

+};



+&emac {

phy-supply = <&reg_aldo2>;

+};



+&mmc1 {

vmmc-supply = <&reg_cldo3>;
vqmmc-supply = <&reg_aldo1>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";

+};



+&uart1 {

pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts;
status = "okay";

bluetooth {
compatible = "realtek,rtl8723bs-bt";


device-wake-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */


host-wake-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */


enable-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */


max-speed = <1500000>;


};

+};
diff --git a/arch/arm/dts/sun50i-h6-tanix-tx6-mini.dts b/arch/arm/dts/sun50i-h6-tanix-tx6-mini.dts
new file mode 100644
index 0000000000..08d84160d8
--- /dev/null
+++ b/arch/arm/dts/sun50i-h6-tanix-tx6-mini.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2021 Jernej Skrabec jernej.skrabec@gmail.com



+/dts-v1/;



+#include "sun50i-h6-tanix.dtsi"



+/ {

model = "Tanix TX6 mini";
compatible = "oranth,tanix-tx6-mini", "allwinner,sun50i-h6";

+};



+&r_ir {

linux,rc-map-name = "rc-tanix-tx3mini";

+};
diff --git a/arch/arm/dts/sun50i-h6-tanix-tx6.dts b/arch/arm/dts/sun50i-h6-tanix-tx6.dts
index be81330db1..9a38ff9b3f 100644
--- a/arch/arm/dts/sun50i-h6-tanix-tx6.dts
+++ b/arch/arm/dts/sun50i-h6-tanix-tx6.dts
@@ -3,122 +3,27 @@
/dts-v1/;
-#include "sun50i-h6.dtsi"
-#include "sun50i-h6-cpu-opp.dtsi"



-#include <dt-bindings/gpio/gpio.h>
+#include "sun50i-h6-tanix.dtsi"
/ {
   model = "Tanix TX6";
   compatible = "oranth,tanix-tx6", "allwinner,sun50i-h6";


aliases {
serial0 = &uart0;


};

chosen {
stdout-path = "serial0:115200n8";


};

connector {
compatible = "hdmi-connector";


ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */


type = "a";



port {


	hdmi_con_in: endpoint {


		remote-endpoint = <&hdmi_out_con>;


	};


};


};

reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";


regulator-name = "vcc3v3";


regulator-min-microvolt = <3300000>;


regulator-max-microvolt = <3300000>;


};

reg_vdd_cpu_gpu: vdd-cpu-gpu {
compatible = "regulator-fixed";


regulator-name = "vdd-cpu-gpu";


regulator-min-microvolt = <1135000>;


regulator-max-microvolt = <1135000>;


};

-};



-&cpu0 {

cpu-supply = <&reg_vdd_cpu_gpu>;

-};



-&de {

status = "okay";

-};



-&dwc3 {

status = "okay";

-};



-&ehci0 {

status = "okay";

-};



-&ehci3 {

status = "okay";

-};



-&gpu {

mali-supply = <&reg_vdd_cpu_gpu>;
status = "okay";

-};



-&hdmi {

status = "okay";

-};



-&hdmi_out {

hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;


};

-};



-&mmc0 {

pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_vcc3v3>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = "okay";

-};



-&ohci0 {

status = "okay";

-};



-&ohci3 {

status = "okay";

};
&r_ir {
   linux,rc-map-name = "rc-tanix-tx5max";

status = "okay";

};
-&uart0 {
+&uart1 {
   pinctrl-names = "default";

pinctrl-0 = <&uart0_ph_pins>;


pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts;
status = "okay";

-};
-&usb2otg {

dr_mode = "host";
status = "okay";

-};



-&usb2phy {

status = "okay";

-};



-&usb3phy {

status = "okay";


bluetooth {
compatible = "realtek,rtl8822cs-bt";


device-wake-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */


host-wake-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */


enable-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */


};

};
diff --git a/arch/arm/dts/sun50i-h6-tanix.dtsi b/arch/arm/dts/sun50i-h6-tanix.dtsi
new file mode 100644
index 0000000000..edb71e4a03
--- /dev/null
+++ b/arch/arm/dts/sun50i-h6-tanix.dtsi
@@ -0,0 +1,189 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2019 Jernej Skrabec jernej.skrabec@siol.net



+/dts-v1/;



+#include "sun50i-h6.dtsi"
+#include "sun50i-h6-cpu-opp.dtsi"



+#include <dt-bindings/gpio/gpio.h>



+/ {

aliases {
serial0 = &uart0;


};

chosen {
stdout-path = "serial0:115200n8";


};

connector {
compatible = "hdmi-connector";


ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */


type = "a";



port {


	hdmi_con_in: endpoint {


		remote-endpoint = <&hdmi_out_con>;


	};


};


};

/* used for FD650 LED display driver */
i2c {
compatible = "i2c-gpio";


sda-gpios = <&pio 7 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PH6 */


scl-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PH5 */


i2c-gpio,delay-us = <5>;


};

reg_vcc1v8: regulator-vcc1v8 {
compatible = "regulator-fixed";


regulator-name = "vcc1v8";


regulator-min-microvolt = <1800000>;


regulator-max-microvolt = <1800000>;


};

reg_vcc3v3: regulator-vcc3v3 {
compatible = "regulator-fixed";


regulator-name = "vcc3v3";


regulator-min-microvolt = <3300000>;


regulator-max-microvolt = <3300000>;


};

reg_vdd_cpu_gpu: regulator-vdd-cpu-gpu {
compatible = "regulator-fixed";


regulator-name = "vdd-cpu-gpu";


regulator-min-microvolt = <1135000>;


regulator-max-microvolt = <1135000>;


};

sound-spdif {
compatible = "simple-audio-card";


simple-audio-card,name = "sun50i-h6-spdif";



simple-audio-card,cpu {


	sound-dai = <&spdif>;


};



simple-audio-card,codec {


	sound-dai = <&spdif_out>;


};


};

spdif_out: spdif-out {
#sound-dai-cells = <0>;


compatible = "linux,spdif-dit";


};

wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";


clocks = <&rtc 1>;


clock-names = "ext_clock";


reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */


};

+};



+&cpu0 {

cpu-supply = <&reg_vdd_cpu_gpu>;

+};



+&de {

status = "okay";

+};



+&dwc3 {

status = "okay";

+};



+&ehci0 {

status = "okay";

+};



+&ehci3 {

status = "okay";

+};



+&gpu {

mali-supply = <&reg_vdd_cpu_gpu>;
status = "okay";

+};



+&hdmi {

status = "okay";

+};



+&hdmi_out {

hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;


};

+};



+&mmc0 {

pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_vcc3v3>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = "okay";

+};



+&mmc1 {

vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc1v8>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";

+};



+&mmc2 {

vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc1v8>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
mmc-hs200-1_8v;
status = "okay";

+};



+&ohci0 {

status = "okay";

+};



+&ohci3 {

status = "okay";

+};



+&pio {

vcc-pc-supply = <&reg_vcc1v8>;
vcc-pd-supply = <&reg_vcc3v3>;
vcc-pg-supply = <&reg_vcc1v8>;

+};



+&r_ir {

status = "okay";

+};



+&spdif {

status = "okay";

+};



+&uart0 {

pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";

+};



+&usb2otg {

dr_mode = "host";
status = "okay";

+};



+&usb2phy {

status = "okay";

+};



+&usb3phy {

status = "okay";

+};
diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi
index af8b7d0ef7..71a45a624d 100644
--- a/arch/arm/dts/sun50i-h6.dtsi
+++ b/arch/arm/dts/sun50i-h6.dtsi
@@ -119,10 +119,10 @@
   		display_clocks: clock@0 {
   			compatible = "allwinner,sun50i-h6-de3-clk";
   			reg = <0x0 0x10000>;

		clocks = <&ccu CLK_DE>,


			 <&ccu CLK_BUS_DE>;


		clock-names = "mod",


			      "bus";




		clocks = <&ccu CLK_BUS_DE>,


			 <&ccu CLK_DE>;


		clock-names = "bus",


			      "mod";
	resets = <&ccu RST_BUS_DE>;
	#clock-cells = <1>;
	#reset-cells = <1>;



@@ -153,6 +153,15 @@
   		};
   	};

video-codec-g2@1c00000 {


	compatible = "allwinner,sun50i-h6-vpu-g2";


	reg = <0x01c00000 0x1000>;


	interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;


	clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>;


	clock-names = "bus", "mod";


	resets = <&ccu RST_BUS_VP9>;


};


video-codec@1c0e000 {
  	compatible = "allwinner,sun50i-h6-video-engine";
  	reg = <0x01c0e000 0x2000>;

@@ -271,6 +280,15 @@
   		};
   	};

timer@3009000 {


	compatible = "allwinner,sun50i-h6-timer",


		     "allwinner,sun8i-a23-timer";


	reg = <0x03009000 0xa0>;


	interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,


		     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;


	clocks = <&osc24M>;


};


watchdog: watchdog@30090a0 {
  	compatible = "allwinner,sun50i-h6-wdt",
  		     "allwinner,sun6i-a31-wdt";


    