On 01.02.2019 15:19, Lukasz Majewski wrote:
Hi Stefan,
On 20.01.2019 14:34, Lukasz Majewski wrote:
Provide function to enable I2C2 clock for vf610 (BK4) - in the generic code.
Can you split this in two commits, one adding enable_i2c_clk and the second removing board specific clock enable?
This particular commit only adds new clock to generic driver.
No, this commit also touches board/phytec/pcm052/pcm052.c.
There is a commit latter, which is removing the board file: [PATCH v2 15/21] pcm052: board: Remove in-board setup code (it is now replaced by DM setup)
The approach as is is optimal - I do not see any build errors for separate patches.
Also our module seems to use I2C0, could you add that instance to the supported instances too? It should be rather trivial:
switch (i2c_num) { case 0: clrsetbits_le32(&ccm->ccgr4, CCM_CCGR4_I2C0_CTRL_MASK, CCM_CCGR4_I2C0_CTRL_MASK);
The problem is that this change is not related to BK4/PCM052 ... or "our module" is a PCM052?
If this is some custom board / module (not pcm052) then I would prefer to have this change as a separate (not related to this patch set) patch.
You are touching common code. So far enable_i2c_clk was a weak function which returned 1. If a board calls that function with i2c_num other than 2, the new platform specific enable_i2c_clk will return -EINVAL... Hence this breaks boards which do not use instance 2...
I am not asking to update other board files. Simply making the common code to work for all (known) cases.
-- Stefan
...
-- Stefan
Signed-off-by: Lukasz Majewski lukma@denx.de
Changes in v2: None
arch/arm/cpu/armv7/vf610/generic.c | 19 +++++++++++++++++++ arch/arm/include/asm/arch-vf610/clock.h | 3 +++ board/phytec/pcm052/pcm052.c | 2 +- 3 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index cbd3391918..f1e6c7816e 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -375,3 +375,22 @@ void enable_caches(void) mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option); } #endif
+#ifdef CONFIG_SYS_I2C_MXC +/* i2c_num can be from 0 - 3 */ +int enable_i2c_clk(unsigned char enable, unsigned int i2c_num) +{
- struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR;
- switch (i2c_num) {
- case 2:
clrsetbits_le32(&ccm->ccgr10,CCM_CCGR10_I2C2_CTRL_MASK,
CCM_CCGR10_I2C2_CTRL_MASK);break;- default:
return -EINVAL;- }
- return 0;
+} +#endif diff --git a/arch/arm/include/asm/arch-vf610/clock.h b/arch/arm/include/asm/arch-vf610/clock.h index 3bd73a01f3..72184fd608 100644 --- a/arch/arm/include/asm/arch-vf610/clock.h +++ b/arch/arm/include/asm/arch-vf610/clock.h @@ -22,6 +22,9 @@ enum mxc_clock { void enable_ocotp_clk(unsigned char enable); unsigned int mxc_get_clock(enum mxc_clock clk); u32 get_lpuart_clk(void); +#ifdef CONFIG_SYS_I2C_MXC +int enable_i2c_clk(unsigned char enable, unsigned int i2c_num); +#endif
#define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK)
diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index f988af2abc..cfc8009102 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -485,7 +485,7 @@ static void clock_init(void) clrsetbits_le32(&ccm->ccgr9, CCM_REG_CTRL_MASK, CCM_CCGR9_FEC0_CTRL_MASK | CCM_CCGR9_FEC1_CTRL_MASK); clrsetbits_le32(&ccm->ccgr10, CCM_REG_CTRL_MASK,
CCM_CCGR10_NFC_CTRL_MASK |CCM_CCGR10_I2C2_CTRL_MASK);
CCM_CCGR10_NFC_CTRL_MASK);clrsetbits_le32(&anadig->pll2_ctrl,
ANADIG_PLL2_CTRL_POWERDOWN, ANADIG_PLL2_CTRL_ENABLE | ANADIG_PLL2_CTRL_DIV_SELECT);
Best regards,
Lukasz Majewski
--
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