4 Nov
2016
4 Nov
'16
2:18 p.m.
On Thu, Nov 3, 2016 at 4:52 PM, Alexander Graf agraf@suse.de wrote:
On 11/03/2016 02:36 AM, Andre Przywara wrote:
These days many Allwinner SoCs use clock_sun6i.c, although out of them only the (original sun6i) A31 has a second MBUS clock register. Also setting up the PRCM PLL_CTLR1 register to provide the proper voltage seems to be an A31-only feature as well. So restrict the initialization to this SoC only to avoid writing bogus values to (undefined) registers in other chips.
Signed-off-by: Andre Przywara andre.przywara@arm.com
Reviewed-by: Alexander Graf agraf@suse.de
(However I haven't counter-checked with specs)
Reviewed-by: Chen-Yu Tsai wens@csie.org