On Wed, Jun 7, 2017 at 11:48 AM, Chen-Yu Tsai wens@csie.org wrote:
On Wed, Jun 7, 2017 at 8:47 AM, Icenowy Zheng icenowy@aosc.io wrote:
A83T SoC has two part of CPUCFG configurations -- one part is at 0x01700000, which contains most of the controls, and is like the one in A80; the another part is at 0x01f01c00 (like other post-sun6i SoCs), but contains now only a few registers.
Call it SUNXI_R_CPUCFG_BASE, like what the BSP Linux source code did.
Signed-off-by: Icenowy Zheng icenowy@aosc.io
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index a96680d8e8..5c74714084 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -179,6 +179,8 @@ defined(CONFIG_MACH_SUN50I) !defined CONFIG_MACH_SUN8I_A83T && \ !defined CONFIG_MACH_SUN8I_R40 #define SUNXI_CPUCFG_BASE 0x01f01c00 +#elif defined CONFIG_MACH_SUN8I_A83T +#define SUNXI_R_CPUCFG_BASE 0x01f01c00 #endif
Since this is unrelated to CPUCFG (which we might use later on), Just put it in a separate #ifdef section, instead of with the other CPUCFG ones.
Also this looks like you don't define CPUCFG, which you later use in the implementation? Can you elaborate on that?
ChenYu