Defaults are for Infineon DDR timings. Since none of the supported boards currently do XIP boot, these seem to be faulty. fix the values as per the calculations(ACTIMA,B), conf the sdrc power with pwdnen and wakeupproc bits
Signed-off-by: Nishanth Menon nm@ti.com Cc: David B david-b@pacbell.net Cc: Vikram Pandita vikram.pandita@ti.com Cc: Richard Woodruff r-woodruff2@ti.com Cc: Sandeep Paulraj s-paulraj@ti.com Cc: Tom Rix tom.rix@windriver.com Cc: Dirk Behme dirk.behme@googlemail.com
cpu/arm_cortexa8/omap3/mem.c | 3 ++- include/asm-arm/arch-omap3/cpu.h | 1 + include/asm-arm/arch-omap3/mem.h | 8 ++++---- 3 files changed, 7 insertions(+), 5 deletions(-)
Pushed to u-boot-ti next
http://git.denx.de/?p=u-boot/u-boot-ti.git;a=commitdiff;h=f714f3a12c09260c50...
Thanks, Sandeep