Hello Vipin,
I have prepared this patch after the work I have done for the new asic which embeds the I2C designware IP configured with the stop bit controlled by s/w.
I quickly tested it on both this asic AND the SPEAr1340, but if you can quickly check yourself would be good.
I think that this patch may be included in the work you are preparing on your own repo, but I rebased this work on the Heiko's u-boot-i2c.git repo.
Thx, Arm
Armando Visconti (3): designware_i2c.c: Added the support for MULTI_BUS designware_i2c: Added s/w generation of stop bit designware_i2c: Fixed the setting of the i2c bus speed
drivers/i2c/designware_i2c.c | 121 +++++++++++++++++++++++++++++++++++------- drivers/i2c/designware_i2c.h | 1 + 2 files changed, 103 insertions(+), 19 deletions(-)